JTAG can not connet LS1020A

[zhanghuan9]

Hi experts, I’ve got my PCBA which takes LS1020A as the main CPU. Now, I'm working on LS1020A debugging. I have the following questions, and hope you can help me.

1. JTAG simulator can’t connect the device in any case. we change it to hard-coded RCW, it reports:” Failed to resume target process. CCSProtocolPlugin : CCS: Scan timeout”;
2. We choose QSPI flash as the boot source, but when we get the first PCBA，there is no uboot or firmware in the flash, so at this time, can I use JTAG simulator to connet LS1020A?
3. How can I download uboot or firmware into the QSPI flash when I get a blank board?

[ufedor]

Which JTAG tool you use?

[zhanghuan9]

Hi,

I use CWH-CTP-CTX10-YE and CWH-CTP-BASE-HE,  and the software is CodeWarrior, Version:10.0.9.

The JTAG simulator and software have been verified OK on NXP’s demo board, TWR-LS1021A-PC-DF.

[ufedor]

Please doublecheck the design referring the AN4878 - LS1021A Design Checklist and the LS1021A evaluation board design materials.

[zhanghuan9]

I have found that it seems I can only connect JTAG and LS1020A under hard-coded RCW mode when I get a blank board. And at this mode, unless I download all the configuration all right into EMMC/SD card, JTAG can’t connect LS1020A again. So I have to change the hardware to hard-coded RCW mode to connect. Once and once again… So, our team take more than one week to get uboot up. I feel so confused why LS1020A designed like this? There should be one method at least to connect this chip and PC to download uboot or RCW.

[ufedor]

This means that there are problems with hardware design.

Please doublecheck the design referring the AN4878 - LS1021A Design Checklist and the LS1021A evaluation board design materials.

[zhanghuan9]

YES. And thank you very much.

I suggest you to reconsider this design logic. It’s really hard for a new developer to understand this debug progress.