Hello,
I’m working with a custom board based on the LS1046A.
Previously, the FPGA on our board was mapped to the memory region starting at 0x7FB0_XXXX.
Now, I would like to modify the configuration so that multiple FPGAs can each use a different memory region in the 0x7FBX_XXXX range (e.g., 0x7FB1_XXXX, 0x7FB2_XXXX, etc.).
Is it possible to change the FPGA base address to different regions within this range? If so, where should this be configured — in the device tree, RCW, or elsewhere?
Thank you for your support.
Solved! Go to Solution.
I could not get your question of " is it still possible to change the base address for each FPGA?".
But you could change the base address on LS1046A, please kindly refer the
LS1043A Interfacing with CPLD in LS1043ARDB Application Note
AN12098: This document explains how IFC interface is used to connect the LS1043A processor and CPLD used on the LS1043A reference design board (RDB).
That would be similar to LS1046A.
Regards,
I could not get your question of " is it still possible to change the base address for each FPGA?".
But you could change the base address on LS1046A, please kindly refer the
LS1043A Interfacing with CPLD in LS1043ARDB Application Note
AN12098: This document explains how IFC interface is used to connect the LS1043A processor and CPLD used on the LS1043A reference design board (RDB).
That would be similar to LS1046A.
Regards,
For additional context:
Our board does not use NOR flash and boots from eMMC.
All IFC chip selects (CS0 to CS4) are connected to FPGAs.
Given this setup, is it still possible to change the base address for each FPGA?