IFC Bus Width Configuration

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IFC Bus Width Configuration

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m_syed_ahmed
Contributor III

I am working on an LS1021A custom board with a 24 address lines configuration. Whenever we have tried to read memory, the address seems to be shifted by 1 bit. Like when we write into address 0x60000002 A23 line seems to be toggled instead of A22. Why there is always a 1-bit shift in address all the time. Here are 2 different  IFC_CSOR configurations we tried.

#define CONFIG_SYS_NOR_CSOR (CSOR_NOR_ADM_SHIFT(7) | \ CSOR_NOR_ADM_SHFT_MODE_EN | \
CSOR_NOR_TRHZ_80)

#define CONFIG_SYS_NOR_CSOR (CSOR_NOR_ADM_SHIFT(7) |\
CSOR_NOR_TRHZ_80)

If we enabled ADM SHIFT MODE enabled, we are not at all seeing any toggle and in the next one, we are seeing as I mentioned above. What should be the proper configuration with regards to 24 bit configuration to have them without any shifts?

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Bulat
NXP Employee
NXP Employee

Actually you have 25-bit address bus (A0-A24), but address LSB A24 is not used due to 16-bit memory port. ADM_SHIFT = 7 is correct setting in this case. Your observation "When we tried to write to the 0x60000002, we observed the A23 line getting toggled instead of A22" is correct, A23 = 1 when address is 0x60000002.

 

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Bulat
NXP Employee
NXP Employee

I assume your flash device does not have internal address latch. In this case ADM SHIFT MODE should be set to '0'.

Concerning "24 address lines" your configuration is not clear. Please clarify:

What is NOR flash data bus width?

What is connection of flash's A0? Which address signal of the LS1021A?

What are configurations of RCW[412-413], RCW[384-386] and RCW[415]?

 

Regards,

Bulat

 

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m_syed_ahmed
Contributor III

Hi Bulat,

We are using two S29GL256-70FLET Flash Chips for NOR.

NOR Flash Data Bus Width 16  bit (DQ0 -DQ15) and Address Bus Width is 24 (A0 - A23).

A23 of LS1021 is connected to A0 of NOR Flash.

RCW (384 -386) ---> IFC_CS4/IFC_CS4_B, RCW (412-413) ---> GPIO2_25, 26, 27, RCW (415) ---> IFC_A[22:24]

 

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Bulat
NXP Employee
NXP Employee

RCW settings look correct.

Can you describe the problem with "incorrect addressing" in more details?

Did you use a scope LA to check address lines?

 

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m_syed_ahmed
Contributor III

Yes, we tried with the scope to probe the address lines. When we tried to write to the 0x60000002, we observed the A23 line getting toggled instead of A22. We tested with different ADM_SHIFT values like 4, 7, 8. We observed that the write address always shifted to the right by 1 bit. When we set the LSB in address lines, A23 is not getting toggled. Instead, A22 is getting toggled.

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Bulat
NXP Employee
NXP Employee

Actually you have 25-bit address bus (A0-A24), but address LSB A24 is not used due to 16-bit memory port. ADM_SHIFT = 7 is correct setting in this case. Your observation "When we tried to write to the 0x60000002, we observed the A23 line getting toggled instead of A22" is correct, A23 = 1 when address is 0x60000002.

 

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