How to know the address of SNVS (SNVS_HPSR_REG)?

[mbourhis]

Hi,

It is the first time that I configure a LS1028a in SecureBoot.

I do not use CodeWarrior; I have generated the images (pbl, u-boot, ...) with Yocto.

I read the LSDK 21.08 DevelopmentKit UserGuide, and I want to check the SNVS registers (to check the status of the Fuses).

The command of LSDKUG is :

=> md $SNVS_HPSR_REG

Please, where this variable 'SNVS_HPSR_REG' is defined?

On my board, in the U-Boot prompt, I have the following result:

=> md $SRKHR0
md - memory display

Usage:
md [.b, .w, .l, .q] address [# of objects]

=> md $SRKHR0 0x10
00000010: 00000000 00000000 00000000 00000000 ................
00000020: 00000000 00000000 00000000 00000000 ................
00000030: 00000000 00000000 00000000 00000000 ................
00000040: 00000000 00000000 00000000 00000000 ................
00000050: 00000000 00000000 00000000 00000000 ................
00000060: 00000000 00000000 00000000 00000000 ................
00000070: 00000000 00000000 00000000 00000000 ................
00000080: 00000000 00000000 00000000 00000000 ................
00000090: 00000000 00000000 00000000 00000000 ................
000000a0: 00000000 00000000 00000000 00000000 ................
000000b0: 00000000 00000000 00000000 00000000 ................
000000c0: 00000000 00000000 00000000 00000000 ................
000000d0: 00000000 00000000 00000000 00000000 ................
000000e0: 00000000 00000000 00000000 00000000 ................
000000f0: 00000000 00000000 00000000 00000000 ................
00000100: 00000000 00000000 00000000 00000000 ................

Thank you for your help.

[mbourhis]

Here the logs of boot, with the U-Boot logs:

NOTICE: 1 GB DDR4, 32-bit, CL=11, ECC on
NOTICE: BL2: v1.5(release):zeus.TQMLS1028A.BSP.SW.0103
NOTICE: BL2: Built : 06:41:50, Sep 28 2021
NOTICE: BL31: v1.5(release):zeus.TQMLS1028A.BSP.SW.0103
NOTICE: BL31: Built : 06:41:50, Sep 28 2021
NOTICE: Welcome to LS1028 BL31 Phase

U-Boot 2019.10+zeus.TQMLS1012AL.BSP.SW.0010 (Sep 27 2021 - 23:18:29 +0000)

SoC: LS1028A Rev1.0 (0x870b0110)
Clock Configuration:
CPU0(A72):1300 MHz CPU1(A72):1300 MHz
Bus: 400 MHz DDR: 1600 MT/s
Reset Configuration Word (RCW):
00000000: 34004010 00000030 00000000 00000000
00000010: 00000000 008e0000 0030c000 00000000
00000020: 01603150 00002580 00000000 00008096
00000030: 00000000 00000010 00000000 00000000
00000040: 00000000 00000000 00000000 00000000
00000050: 00000000 00000000 00000000 00000000
00000060: 00000000 00000000 000e7000 00000000
00000070: eb580000 03000000
Model: MBLS1028A starterkit
DRAM: 958 MiB (DDR4, 32-bit, CL=11, ECC on)
Error: failed to initialize clockgen: -121
Ethernet, PCIe and SATA may not function properly, please check signal switch S10.1
Using SERDES1 Protocol: 60248 (0xeb58)
PCIe0: pcie@3400000 disabled
PCIe1: pcie@3500000 Root Complex: no link
WDT: Started with servicing (60s timeout)
MMC: FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... OK
In: serial
Out: serial
Err: serial
TQMLS1028A EEPROM:
ID: TQMLS1028A-AA.0202
SN: 74803571
MAC: 00:d0:93:53:36:26
Net: eth0: enetc-0, eth1: enetc-1 [PRIME], eth2: enetc-2Could not get PHY for emdio-3: addr 28
Could not get PHY for emdio-3: addr 29
Could not get PHY for emdio-3: addr 30
Could not get PHY for emdio-3: addr 31

Warning: swp0 (eth4) using random MAC address - e6:3b:45:c2:0c:cd
, eth4: swp0
Warning: swp1 (eth5) using random MAC address - c2:44:c2:05:f5:b1
, eth5: swp1
Warning: swp2 (eth6) using random MAC address - de:58:7d:01:80:12
, eth6: swp2
Warning: swp3 (eth7) using random MAC address - 4e:35:58:eb:3a:d5
, eth7: swp3
Booting from: SDHC1 (SD)
Hit any key to stop autoboot: 0
=>

[ufedor]

Which NXP LSDK is used?

The firmware seems to be out-of-date.

The latest LSDK is 21.08.

[ufedor]

Please provide U-Boot booting log.