How to do about modify the register about the SO-DIMM, Long-DIMM and OnBoard DDR?

[charleshuang]

Hi NXP 

Because the DDR default setting is for Long DIMM DDR in Demo board (BSP is LSDK20.12).

My platform used the SO-DIMM DDR, so how to do about modify the register for my platform (LS1046).

And How to do about modify the register for the SO-DIMM, Long-DIMM and OnBoard DDR?

[yipingwang]

Please go to atf source code, you need to modify atf/plat/nxp/soc-ls1046a/ls1046ardb/ddr_init.c according to your target board.

For SO-DIMM and Long-DIMM DDR, please modify struct rc_timing rce and struct board_timing udimm in atf/plat/nxp/soc-ls1046a/ls1046ardb/ddr_init.c according to your DDR configuration.

For example,

static const struct rc_timing rce[] = {
{1600, 8, 7},
{1867, 8, 7},
{2134, 8, 9},
{}
};

static const struct board_timing udimm[] = {
{0x04, rce, 0x01020304, 0x06070805},
{0x1f, rce, 0x01020304, 0x06070805},
};

You need to use QCVS DDRv tool to create a project with reading from SPD method, then connect to the target board to do optimization and validation, the final result for struct rc_timing and struct board_timing will be listed in ddr_init1.c file in Generated_Code folder.

For OnBoard DDR, static timing can be used to configure DDR timing parameters.

Please define CONFIG_STATIC_DDR in atf/plat/nxp/soc-ls1046a/ls1046ardb/platform_def.h.

You need to modify "struct ddr_cfg_regs static_1600" in ddr_init.c according to your target board, I assume the DDR frequency is 1600MT/s.

You need to create a QCVS DDR project with the default configuration, then modify properties panel according to your DDR datasheet, after connecting to the target board to do optimization and validation, you will get DDR configuration register values in ddr_init1.c file in Generated_Code folder..