Help with custom DDR4 tf-a configuration in LS1023A board

[p_dembicki]

Hi everybody,

I try to bring up custom board with  LS1023A and 2 x  MT40A512M16LY-062E IT:E.

My DDR connection in attached pdf.

I tried config (with adjusted dq map) taken from this thread, but it causes error:

INFO:    RCW BOOT SRC is SD/EMMC
INFO:    RCW BOOT SRC is SD/EMMC
INFO:    esdhc_emmc_init
INFO:    Card detected successfully
INFO:    esdhc_wait_response: IRQSTAT CTOE set = 10001
INFO:    init done:
INFO:    platform clock 400000000
INFO:    DDR PLL1 1600000000
INFO:    DDR PLL2 0
INFO:    time base 41 ms
INFO:    Parse DIMM SPD(s)
INFO:    cal cs
INFO:    cs_in_use = 1
INFO:    cs_on_dimm[0] = 1
NOTICE:  Fixed DDR on board
INFO:    Time after parsing SPD 13 ms
INFO:    Synthesize configurations
INFO:    cs 0
INFO:         odt_rd_cfg 0x0
INFO:         odt_wr_cfg 0x4
INFO:         odt_rtt_norm 0x3
INFO:         odt_rtt_wr 0x0
INFO:         auto_precharge 0
INFO:    cs 1
INFO:         odt_rd_cfg 0x0
INFO:         odt_wr_cfg 0x0
INFO:         odt_rtt_norm 0x0
INFO:         odt_rtt_wr 0x0
INFO:         auto_precharge 0
INFO:    cs 2
INFO:         odt_rd_cfg 0x0
INFO:         odt_wr_cfg 0x0
INFO:         odt_rtt_norm 0x0
INFO:         odt_rtt_wr 0x0
INFO:         auto_precharge 0
INFO:    cs 3
INFO:         odt_rd_cfg 0x0
INFO:         odt_wr_cfg 0x0
INFO:         odt_rtt_norm 0x0
INFO:         odt_rtt_wr 0x0
INFO:         auto_precharge 0
INFO:    ctlr_init_ecc 0
INFO:    x4_en 0
INFO:    ap_en 0
INFO:    ctlr_intlv 0
INFO:    ctlr_intlv_mode 0
INFO:    ba_intlv 0x0
INFO:    data_bus_used 1
INFO:    otf_burst_chop_en 0
INFO:    burst_length 0x8
INFO:    dbw_cap_shift 0
INFO:    Assign binding addresses
INFO:    ctlr_intlv 0
INFO:    rank density 0x80000000
INFO:    CS 0
INFO:        base_addr 0x0
INFO:        size 0x80000000
INFO:    base 0x0
INFO:    Total mem by assignment is 0x80000000
INFO:    Calculate controller registers
INFO:    Skip CL mask for this speed 0xc00
INFO:    Skip caslat 0xc00
INFO:    cs_in_use = 0x1
INFO:    cs0
INFO:       _config = 0x80040412
INFO:    cs[0].bnds = 0x7f
INFO:    sdram_cfg[0] = 0xc50c0000
INFO:    sdram_cfg[1] = 0x401100
INFO:    sdram_cfg[2] = 0x0
INFO:    timing_cfg[0] = 0x91550018
INFO:    timing_cfg[1] = 0xcac60c52
INFO:    timing_cfg[2] = 0x48c118
INFO:    timing_cfg[3] = 0x1111000
INFO:    timing_cfg[4] = 0x2
INFO:    timing_cfg[5] = 0x4401400
INFO:    timing_cfg[6] = 0x0
INFO:    timing_cfg[7] = 0x23300000
INFO:    timing_cfg[8] = 0x3116600
INFO:    timing_cfg[9] = 0x0
INFO:    dq_map[0] = 0x43643040
INFO:    dq_map[1] = 0xd90c0000
INFO:    dq_map[2] = 0x0
INFO:    dq_map[3] = 0x0
INFO:    sdram_mode[0] = 0x3010214
INFO:    sdram_mode[1] = 0x0
INFO:    sdram_mode[9] = 0x4000000
INFO:    sdram_mode[8] = 0x500
INFO:    sdram_mode[2] = 0x10214
INFO:    sdram_mode[3] = 0x0
INFO:    sdram_mode[10] = 0x400
INFO:    sdram_mode[11] = 0x4000000
INFO:    sdram_mode[4] = 0x10214
INFO:    sdram_mode[5] = 0x0
INFO:    sdram_mode[12] = 0x400
INFO:    sdram_mode[13] = 0x4000000
INFO:    sdram_mode[6] = 0x10214
INFO:    sdram_mode[7] = 0x0
INFO:    sdram_mode[14] = 0x400
INFO:    sdram_mode[15] = 0x4000000
INFO:    interval = 0x18600618
INFO:    zq_cntl = 0x8a090705
INFO:    ddr_sr_cntr = 0x0
INFO:    clk_cntl = 0x3000000
INFO:    cdr[0] = 0x80040000
INFO:    cdr[1] = 0xa181
INFO:    wrlvl_cntl[0] = 0x8675f607
INFO:    wrlvl_cntl[1] = 0x7090807
INFO:    wrlvl_cntl[2] = 0x7070707
INFO:    debug[28] = 0x46
INFO:    Time before programming controller 261 ms
INFO:    Program controller registers
INFO:    Reading debug[9] as 0x10101010
INFO:    Reading debug[10] as 0x10101010
INFO:    cpo_min 0x10
INFO:    cpo_max 0x10
INFO:    debug[28] 0x700046
INFO:    Optimal cpo_sample 0x37
INFO:    *0x1080000 = 0x7f
INFO:    *0x1080080 = 0x80040412
INFO:    *0x1080100 = 0x1111000
INFO:    *0x1080104 = 0x91550018
INFO:    *0x1080108 = 0xcac60c52
INFO:    *0x108010c = 0x48c118
INFO:    *0x1080110 = 0xc50c0000
INFO:    *0x1080114 = 0x401100
INFO:    *0x1080118 = 0x3010214
INFO:    *0x1080120 = 0x600041f
INFO:    *0x1080124 = 0x18600618
INFO:    *0x1080128 = 0xdeadbeef
INFO:    *0x1080130 = 0x3000000
INFO:    *0x1080160 = 0x2
INFO:    *0x1080164 = 0x4401400
INFO:    *0x108016c = 0x23300000
INFO:    *0x1080170 = 0x8a090705
INFO:    *0x1080174 = 0xc675f607
INFO:    *0x1080190 = 0x7090807
INFO:    *0x1080194 = 0x7070707
INFO:    *0x1080200 = 0x10214
INFO:    *0x1080208 = 0x10214
INFO:    *0x1080210 = 0x10214
INFO:    *0x1080220 = 0x500
INFO:    *0x1080224 = 0x4000000
INFO:    *0x1080228 = 0x400
INFO:    *0x108022c = 0x4000000
INFO:    *0x1080230 = 0x400
INFO:    *0x1080234 = 0x4000000
INFO:    *0x1080238 = 0x400
INFO:    *0x108023c = 0x4000000
INFO:    *0x1080250 = 0x3116600
INFO:    *0x1080280 = 0xffffffff
INFO:    *0x1080284 = 0xffffff22
INFO:    *0x1080288 = 0x212221dc
INFO:    *0x108028c = 0xffffff00
INFO:    *0x1080290 = 0xffff0001
INFO:    *0x10802a0 = 0x1
INFO:    *0x1080400 = 0x43643040
INFO:    *0x1080404 = 0xd90c0000
INFO:    *0x1080b20 = 0x8080
INFO:    *0x1080b24 = 0x80000000
INFO:    *0x1080b28 = 0x80040000
INFO:    *0x1080b2c = 0xa181
INFO:    *0x1080bf8 = 0x20501
INFO:    *0x1080bfc = 0x200
INFO:    *0x1080e40 = 0x80
INFO:    *0x1080f04 = 0x3002
INFO:    *0x1080f08 = 0xb
INFO:    *0x1080f0c = 0x14000c20
INFO:    *0x1080f24 = 0x10101010
INFO:    *0x1080f28 = 0x10101010
INFO:    *0x1080f2c = 0x10101010
INFO:    *0x1080f30 = 0x10101010
INFO:    *0x1080f34 = 0x10103000
INFO:    *0x1080f48 = 0x1
INFO:    *0x1080f4c = 0x94000000
INFO:    *0x1080f50 = 0xc000d00
INFO:    *0x1080f54 = 0xe000f00
INFO:    *0x1080f58 = 0xe000e00
INFO:    *0x1080f5c = 0xe000e00
INFO:    *0x1080f60 = 0xe000000
INFO:    *0x1080f70 = 0x700046
INFO:    *0x1080fb0 = 0x3
INFO:    *0x1080fb4 = 0xf000f0f
INFO:    *0x1080fb8 = 0xf0f
INFO:    *0x1080fbc = 0xf000f0f
INFO:    *0x1080fc0 = 0xf000f0f
INFO:    *0x1080fc4 = 0xf0f0f0f
INFO:    *0x1080fc8 = 0xf0f0f0f
INFO:    *0x1080fcc = 0xf0f0f0f
INFO:    *0x1080fd0 = 0xf0f0f0f
INFO:    *0x1080fd4 = 0xf0f0f0f
INFO:    *0x1080fd8 = 0xf0f0f0f
INFO:    *0x1080fdc = 0xf0f0f0f
INFO:    *0x1080fe0 = 0xf0f0f0f
INFO:    *0x1080fe4 = 0xf0f0f0f
INFO:    *0x1080fe8 = 0xf0f0f0f
INFO:    *0x1080fec = 0xf0f0f0f
INFO:    *0x1080ff0 = 0xf0f0f0f
INFO:    *0x1080ff4 = 0xf0f0f0f
INFO:    *0x1080ff8 = 0xf0f0f0f
INFO:    *0x1080ffc = 0x1f18

NOTICE:  2 GB DDR4, 32-bit, CL=12, ECC off
INFO:    Time used by DDR driver 524 ms
NOTICE:  BL2: v1.5(debug):v21.02.3-52-g6062ccea19e1-dirty
NOTICE:  BL2: Built : 15:27:48, Jun  7 2022
INFO:    Configuring TZASC-380
INFO:    BL2: Doing platform setup
INFO:    BL2: Loading image id 3
INFO:    sd-mmc read done.
WARNING: Firmware Image Package header check failed.
WARNING: Failed to obtain reference to image id=3 (-2)
ERROR:   BL2: Failed to load image (-2)
Authentication failure

 
My config is:

/* DDR model number: MT40A512M16LY-062 IT:E */
struct dimm_params ddr_raw_timing = {
.n_ranks = 1,
.rank_density = 2147483648u,
.capacity = 2147483648u,
.primary_sdram_width = 32,
.rdimm = 0,
.mirrored_dimm = 0,
.n_row_addr = 16,
.n_col_addr = 10,
.bank_addr_bits = 0,
.bank_group_bits = 1,
.burst_lengths_bitmask = 0x0c,
.tckmin_x_ps = 625,
.tckmax_ps = 1500,
.caslat_x = 0x01555400,
.taa_ps = 15000,
.trcd_ps = 15000,
.trp_ps = 15000,
.tras_ps = 32000,
.trc_ps = 47000,
.twr_ps = 15000,
.trfc1_ps = 350000,
.trfc2_ps = 260000,
.trfc4_ps = 160000,
.tfaw_ps = 30000,
.trrds_ps = 5300,
.trrdl_ps = 6400,
.tccdl_ps = 5000,
.refresh_rate_ps = 7800000,
.dq_mapping[0] = 0x10,
.dq_mapping[1] = 0x36,
.dq_mapping[2] = 0x10,
.dq_mapping[3] = 0x30,
.dq_mapping[4] = 0x10,
.dq_mapping[5] = 0x36,
.dq_mapping[6] = 0x10,
.dq_mapping[7] = 0x30,
.dq_mapping_ors = 0,
.rc = 0x1f,
};

Can I please some advice? How to fix it?

[yipingwang]

Please use QCVS DDR tool to assist you configuring DDR initialization parameters.

Please create a default QCVS DDR project for LS1023A processors, then modify Properties panel according to MT40A512M16LY-062E datasheet, build and generate the initial DDR configuration parameters. Then connect QCVS DDR project to the target board to do validation and optimization with DDRv tool to get the final DDR configuration parameters.