Does a MMDC register at address 0x0108_0040 exist for the LS1012A?

[ajee]

Referring to the Target Init File for the LS1012A-FRDM board, here is part of the DDR initialization:

 # Physical parameters
 CCSR_BE_M(0x01080000, 0x05180000)
 CCSR_BE_M(0x01080040, 0x0000007f)


However, no MMDC register with offset 40h is listed in the LS1012A Reference Manual.
Is it reserved or hidden for some reason, or is it a benign typo in the Target Init File?

[Pavel · Accepted solution]

Ignore this setting in CodeWarrior in DDR initialization. This offset is offset for the MDASP register: This register defines the partitioning between chip selects. The LS1012a supports one chip select.

Have a great day,
Pavel Chubakov

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