Does LS1046A support DMA and Cache coherency?

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Does LS1046A support DMA and Cache coherency?

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win847
Contributor I

Does LS1046A support DMA(USB / PCIe / Networking Controller) and CPU Cache coherency? Like description with below link:

https://abcamus.github.io/2017/06/26/ARM-CCI/

https://community.arm.com/cn/b/blog/posts/--1--

https://community.arm.com/cn/b/blog/posts/--3---corelink-cci-500

 

I see the LS1046A Processors Block Diagram contained CCI400

https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/layerscape-processors/la...

 

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ufedor
NXP TechSupport
NXP TechSupport

USB snooping is controlled by the SCFG_SNPCNFGC - refer to the LS1046A Reference Manual, 11.3.27 Snoop Configuration Register (SCFG_SNPCNFGCR).

PCIe snooping is controlled by "No Snoop" TLP attribute.

Frame Manager snooping is always enabled.

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ufedor
NXP TechSupport
NXP TechSupport

USB snooping is controlled by the SCFG_SNPCNFGC - refer to the LS1046A Reference Manual, 11.3.27 Snoop Configuration Register (SCFG_SNPCNFGCR).

PCIe snooping is controlled by "No Snoop" TLP attribute.

Frame Manager snooping is always enabled.

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win847
Contributor I

Thanks for your reply.

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