DDRV read margin strange results (LS1046A)

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DDRV read margin strange results (LS1046A)

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guignbt2v
Contributor III

Hi, 

We just ran DDRV on a custom board with discrete DDR4.

Center clock, ODT read & write tests seem to find a good enough configuration (and from a CPU perspective software tests just run fine on it).

However a 'read margin' test show what appears to be a correct eye diagram but strange location for the bright green mark (see attached picture).

Could someone explain how to understand it?

Thanks

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yipingwang
NXP TechSupport
NXP TechSupport

the VREF training is disabled and fixed value is set. when fixed value is set the test will not show the correct value of VREF during the read.

so to fix this enable the VREF training:

change register DDRCDR_2 (@ address 0x1080B2C) from current value of 0x0000A180 to 0x00000080

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yipingwang
NXP TechSupport
NXP TechSupport

In this case since the board is working the attached read margin you have shows that the tool is reporting the VREF location out side of the Read data eye. then the tool is not working correctly.

we have tested the tool on LS1046ARDB. Would you please use a LS1046ARDB on your tool setup to see if the error also is present on RDB board?
Also, before you start the read margin please capture the register dump from your board via ccs and send it.

How to get register dump via ccs
This is for debug use only.
1) Open a CCS window (C:\Freescale\CW4NET_vxxxxxx\Common\CCS\bin\ccs.exe)
2) Physical connection: USB to PC, JTAG to the your board.
3) SW connection: in the ccs window type:

delete all
config cc cwtap
ccs::config_chain {ls1043a dap sap2}
display ccs::read_mem 32 0x1080000 4 0 1024
ccs::write_mem 32 0x1080FB0 4 0 0x10000000
display ccs::read_mem 32 0x1080000 4 0 1024

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guignbt2v
Contributor III

Hi,

Thanks for your answer.

The 'write margin' test on the very same board gives normal results : normal eye diagrams with 'bright green mark' within the eye.

On the LS1046ARDB board, as on another LS1046A based board, the 'read margin' results also seem 'normal'.

So to me the tool is working... but not fully working on our custom board.

I attached the register dump content.

Thanks

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yipingwang
NXP TechSupport
NXP TechSupport

the VREF training is disabled and fixed value is set. when fixed value is set the test will not show the correct value of VREF during the read.

so to fix this enable the VREF training:

change register DDRCDR_2 (@ address 0x1080B2C) from current value of 0x0000A180 to 0x00000080

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guignbt2v
Contributor III

Hi, thanks, problem solved

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