DDR shows 1GB instead of 4GB ls1021a

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DDR shows 1GB instead of 4GB ls1021a

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jiye
Contributor V

I have 1 4GB DDR3 connected instead of only 1GB as EVA board does. i think my DDR is mapping the same as the EVA mapping

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The problem:

I have the access into the my board now from serial console but it shows 1 GB of DDR in the uboot but I have 4 GB DDR what is the issue here, also when I perform free -m in the linux I saw only 1GB DDR available as well. But my image size is 3.8GB I think my image is running on my 4GB DDR. Any suggestions would be super grateful.

I am not sure if it's U-boot memory configuration settings should be also updated to accommodate new memory configuration. If so anyone know how?

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william_7432
Contributor I

Thanks

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yipingwang
NXP TechSupport
NXP TechSupport

Hello Elias Bitbaker,

Please modify the following section in u-boot source code.

#define PHYS_SDRAM 0x80000000
#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)

#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE

However, you need to pay attention to "System memory map" in LS1021A Reference Manual, only 2G DDR memory can be configured in the system.

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Thanks,

Yiping

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jiye
Contributor V

what do you mean by only 2GB can be configured, does that mean another 2 GB of DDR wont be able to run?

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yipingwang
NXP TechSupport
NXP TechSupport

Only 2G DDR memory can be configured.

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jiye
Contributor V

I only did

#define PHYS_SDRAM_SIZE (2u * 1024 * 1024 * 1024)

now it's not booting I think I need to change something else as well

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yipingwang
NXP TechSupport
NXP TechSupport
Please check DDR controller configuration register DDR_CS0_CONFIG value for your SDRAM (banks, row and column).
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jiye
Contributor V

(1) where to find this information "DDR controller configuration register DDR_CS0_CONFIG"  as you mentioned previously?

(2)

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This is my DDR3 RAM Value

4G_DDR3_SDRAM_256MX16

I dont know why ls1021a twr used the same DDR model MT41K256M16TW-107:P but it shows 1GB on EVA board

but according to lsdk1906

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It supports 2GB

Now I am using the same DDR3L as the EVA board see the last raw in the table below:

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This my DDR3L:

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                MT41K256M16TW-107:P

What changes do I need to make ?

the Value in the configs are :

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Anything wrong here?

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yipingwang
NXP TechSupport
NXP TechSupport

You could use QCVS tool to assist you for DDR_CS0_CONFIG configuration. In DDR configuration panel, please select correct value for DRAM configuration per device to create a QCVS DDR project, then refer to the related register value under Generated_Code.

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jiye
Contributor V

I checked LS1021A datasheet, 16.4.3.4 this is for CS0_CONFIG

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If you take the value from the uboot DDR_CS0_CONFIG  0x80014302,

15x10x3

this matches the row ---------------------------->15

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and the column .-------------------------------------------->13

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This is a 4GB DDR 3L even the EVA board used the same part number. Why it shows only 1GB on EVA as well. How to change it to 2GB that's what I am asking. Please look at table below:

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(1)What's the meaning of Four banks of Memory here, does that mean I need to set to 2 banks so it will be 2GB?If so which register or parameter is used to set the number of banks I can use ?

As 32-bit bank size shows 1GB I assume it's only one bank is used

(2)

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Do you guys have any document to explain what DIMM speed rating and Rank/Chip select I should choose? I could not find any resource what each field mean

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yipingwang
NXP TechSupport
NXP TechSupport

Chip Select 0, 1, 2, 3: Specify the number of physical ranks or chip selects. A DIMM can have 1, 2, or 4 ranks and
are specified in the basic DIMM information as 1R ... or 2R... or 4R. For this, from the four chip selects, enable the
ones that correspond to the ranks (each chip select corresponds to one rank). Also, set size of the DIMM. The size
is configured inside each chip select. For example, a 2 GB dual-ranked DIMM has its size split evenly between the
two ranks such that each chip select is of 1 GB size.

You could use the default DIMM speed rating.

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jiye
Contributor V

Hi Yiping, 

 

can you confirm that the schematic I posted which is the same as the one used by ls1021a-twr is 4GB DDR instead of  4 Gbits (512MB each) ? if it's 4GB why there are 2 of them?

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jiye
Contributor V

what do I need to do after I changed #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) to

#define PHYS_SDRAM_SIZE (2u * 1024 * 1024 * 1024)

 using flex-builder -c uboot -m ls1021atwr -b sd?

then apply the uboot binary into my SD card?

How about the linux kernel image do I need to change anything in the linux ?

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