DDR Validation Tool,write leveling and clock adjust values for higher frequencies 2100 MT/s.

[sreeragag]

Hi

In our processor board, 2GB DDR4 RAM with ECC chip are connected LS1046A Processor DDR controller. Processor is boot fine with ECC enabled on the DDR controller for 1300MT/s and 1400MT/s. If DDR frequency changed to higher frequencies the processor can not boot. DDRv tool is used to find the write leveling values and clock adjust for both lower frequecies and higher frequecies. How to set the DDR write leveling and clock adjust values for higher frequencies? Can we do the tests with DDRv tool for generating higher frequency values? Neverthless we used the values got running DDRv tool for 1600MT/s, 2100 MT/s we were not able to boot.

Can we use the DDRv tool generated DDR configurations for higher frequencies, if we configured the DDR controller 1300MT/s in u-boot?

This is the snippet for ddr configuration we did and attached the DDRv generated report for DDR frequency 1300MT/s

static const struct board_specific_parameters udimm0[] = {
/*
* memory controller 0
* num| hi| rank| clk| wrlvl | wrlvl | wrlvl
* ranks| mhz| GB |adjst| start | ctl2 | ctl3
*/
{1, 1300, 0, 8, 8, 0x08080707, 0x07050606,},
{}
};

[addiyi]

Please open a Technical Case.

https://community.freescale.com/thread/381898

Adrian

[sreeragag]

Hi,

CodeWarrior version is 11.2.3, QCVS Version is 4.8.0.

Imported the configurations  from uboot.

[addiyi]

Please install the latest QCVS release.

Also, note that when importing from target all the uboot config will loaded into QCVS without changes. All timing parameters will be the ones from uboot.

Try to adjust configuration based on the new data rate or try to create using wizard the config using Autoconfig or read SPD and selecting the correct parameters (in these cases Autoconfig/Read SPD calculation is done based on input parameters).

Adrian 

[sreeragag]

Hi Adrian
Thanks for your reply.
We did DDR validations test for the 1300MT/s using updated DDRv tool(Ver #4.10).
The updated parameters are

DDR leveling    :
         *   num|  hi| rank|  clk| wrlvl |   wrlvl   |  wrlvl
         * ranks| mhz| GB  |adjst| start |   ctl2    |  ctl3
         */
        {1,  1300, 0, 8,     8, 0x08080707, 0x07050606,},


Timing     parameters used for 1300MT/s    :
    tckmin_x_ps = 938,
    tckmax_ps = 1900,
    caslat_x = 0xDFA00,
    taa_ps = 12500,
    trcd_ps = 12500,
    trp_ps = 12500,
    tras_ps = 35000,
    trc_ps = 47500,
    trfc1_ps = 260000,
    trfc2_ps = 160000,
    trfc4_ps = 110000,
    tfaw_ps = 20000,
    trrds_ps = 6000,
    trrdl_ps = 6400,
    tccdl_ps = 5355,

Got the new leveling parameters, however we get memory test failures using those parameters!
We use MT40A256M16GE-083E DDR4.
Our DDR routing parameters are set to support DDR speed above 1600MT/s.
Currently we are not able to get any stable configuration for DDR to support above 1300MT/s.
Fortunately we got a partly working u-boot for 1400MT/s, 1600MT/s, and 1800 MT/s but all got crashed while loading file system using the leveling and timing params taken after Validation Test 'Centering The clock'.

[addiyi]

Please provide more information about the initial configuration. Did you read SPD? Did you use autoconfiguration? Or import the config from uboot?

Also, please specify the QCVS version.

Adrian