Custom LS1043A-RGW Board and NAND issues

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Custom LS1043A-RGW Board and NAND issues

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tmorrison
Contributor III

Hi,

We have a custom board - largely based upon the NXP LS1043A-RGW Development board

Due to the parts availability, the NAND is 512MB instead of 128MB.

The device tree for the Development board puts the memory in a weird spot, this is the

u-boot version (difference with the linux version is that it defines the partition:

   &ifc {
       status = "okay";
       #address-cells = <2>;
       #size-cells = <1>;
   /* NAND Flash on board 128MB */
           ranges = <0x0 0x0 0x0 0x7e800000 0x00010000>;
           nand@0,0 {
               compatible = "fsl,ifc-nand";
               #address-cells = <1>;
               #size-cells = <1>;
               reg = <0x1 0x0 0x10000>;
           };

   };

Question 1: Maybe I don't understand something here - but 0x7e800000 + 512MB would put the

                     memory space into DDR?

But, U-Boot isn't using the NAND, so it continues to boot linux. This is the relevant part of the boot log for NAND

   [    2.588917] nand: device found, Manufacturer ID: 0x2c, Chip ID: 0xac
   [    2.595485] nand: Micron MT29F4G08ABBFAH4
   [    2.599746] nand: 512 MiB, SLC, erase size: 256 KiB, page size: 4096, OOB size: 256
   [    2.607423] nand: WARNING: 7e800000.flash: the ECC used on your system is too weak compared to the one required by the NAND chip
   [    2.620121] Bad block table not found for chip 0
   [    2.625787] Bad block table not found for chip 0
   [    2.630399] Scanning device for bad blocks
   [    2.634542] Bad eraseblock 0 at 0x000000000000
   [    2.639031] Bad eraseblock 1 at 0x000000040000

     <snipped>

   [   12.241291] Bad eraseblock 2042 at 0x00001fe80000
   [   12.246040] Bad eraseblock 2043 at 0x00001fec0000
   [   12.250789] Bad eraseblock 2044 at 0x00001ff00000
   [   12.255538] Bad eraseblock 2045 at 0x00001ff40000
   [   12.260287] Bad eraseblock 2046 at 0x00001ff80000
   [   12.265035] Bad eraseblock 2047 at 0x00001ffc0000
   [   12.269734] No space left to write bad block table
   [   12.274518] nand_bbt: error while writing bad block table -28
   [   12.280270] fsl,ifc-nand: probe of 7e800000.nand failed with error -28
   [   12.287152] ------------[ cut here ]------------
   [   12.291758] kernel BUG at /home/tom/lsdk/packages/linux/linux/drivers/base/devres.c:105!

Question 2: Is this the result of not having the nand located correctly.

Question 3: If I need to change the location, I know I will have to change in device tree, but

                     it seems that 0x7e800000 is in config files (at least in u-boot).

Question 4: How do I change the size in the device tree for this NAND Device?

Thanks in advance!

Tom

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yipingwang
NXP TechSupport
NXP TechSupport

You need to modify "NAND User Space" partition to start at the block boundary of the NAND flash in the dts file.

View solution in original post

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tmorrison
Contributor III

Update 1: I changed device tree, so it is located at  0x6000_0000 same issue.

I've seen other posts here and other places, that might nand configuration (ftimxx) might be off...

(for example this very old post: https://community.nxp.com/thread/315973 )

Tom

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yipingwang
NXP TechSupport
NXP TechSupport

Hello Tom,

Unlike NOR flash, NAND flash is not memory mapped device, only the internal SRAM of NAND flash should be configured in memory map. The memory map location 0x7e800000(size 0x00010000) is only configured for the internal SRAM of the NAND flash.

You need to modify NAND flash IFC controller timing configuration and block size in u-boot source code include/configs/ls1043argw.h.

Please refer to https://community.nxp.com/docs/DOC-333350 for IFC controller configuration for the NAND flash on your target board.

Thanks,

Yiping

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tmorrison
Contributor III

Hi Yiping,

Thank you - this solved 95% -

In fact, we were using a newer part which had a different page size and  more spare bits than

supported in the regular CSOR.

[    2.589581] nand: device found, Manufacturer ID: 0x2c, Chip ID: 0xac
[    2.595933] nand: Micron MT29F4G08ABBFAH4
[    2.599944] nand: 512 MiB, SLC, erase size: 256 KiB, page size: 4096, OOB size: 256
[    2.607603] nand: eccSize <512> eccStep(512) ecc/ds-Str(8/8) corr/ds-Cor(64/64)
[    2.609520] Bad block table not found for chip 0
[    2.623360] Bad block table not found for chip 0
[    2.627973] Scanning device for bad blocks
[    2.734763] Bad block table written to 0x00001ffc0000, version 0x01
[    2.742176] Bad block table written to 0x00001ff80000, version 0x01
[    2.748531] 5 ofpart partitions found on MTD device 7e800000.flash
[    2.754706] Creating 5 MTD partitions on "7e800000.flash":
[    2.760193] 0x000000000000-0x000000100000 : "NAND U-Boot Image"
[    2.766596] 0x000000100000-0x000000120000 : "NAND U-Boot Env"
[    2.772758] 0x000000120000-0x000000160000 : "FMAN / QE ucode"
[    2.778894] 0x000000160000-0x000003160000 : "NAND FIT Image"
[    2.785003] 0x000003160000-0x000008000000 : "NAND User Space"
[    2.790745] mtd: partition "NAND User Space" doesn't start on an erase/write block boundary -- force read-only
[    2.801234] fsl,ifc-nand 7e800000.nand: IFC NAND device at 0x7e800000, bank 0

But as you see, I am getting an "error" with the NAND User Space. Is this because this starts at

0x3160000 but my erase size is 256K (0x40000)? 

To fix this - can you confirm I would need to change this to something like 0x3180000?

I can do this in the device tree, and I assume fix this when I am generating a firmware

image for NAND.

Again Thanks

Tom

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yipingwang
NXP TechSupport
NXP TechSupport

You need to modify "NAND User Space" partition to start at the block boundary of the NAND flash in the dts file.

View solution in original post

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