Hi
in our system we use 1000BASE-X (w/o electrical-to-optical converter, full duplex, fix rate, no AN) for on our backplane ethernet communication. For the design of a new module we selected the LS1020 as board controller, and we intent to connect it directly to the backplane w/o any PHY. We assume this should be feasible since the the SGMII and 1000BASE-X are compatible, as long as no speed adaptation is required.
Thanks
Rainer
See the following pages about auto-negotiation:
Solved: 1000BASE-X PCS/PMA or SGMII core 1000BASE-X auto-n... - Community Forums
Have a great day,
Pavel Chubakov
After a lot of reading I increased my confidence that a direct connection of the LS1020 to our 1000Base-X -backplane is feasible.
I think the following configuration could work. It configures the eTESC to operate in 1000BASE-X full-duplex mode without auto-neg. Can anybody confirm this?
MAC configuration:
TBI configuration:
But since the ANLPBPA register cannot be written I do not see how the MAC gets knowledge of the link partner abilities. Could anybody help me with this topic.
Thanks
Rainer
See the following page about problem for your connection:
https://www.finisar.com/sites/default/files/resources/an-2036_1000base-t_sfp_faqreve1.pdf
Have a great day,
Pavel Chubakov
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------
Hi Pavel,
thanks for your support.
Intel's errata concerns implementation in their FPGAs only (I think). Since we will not connect to an Intel FPGA, I think this will not be an issue for us. We intend to connect the LS1021 SerDes pins running SGMII directly connected to a 1340 from Marvell.
Have a nice day,
Rainer