Hello,
we have designed a small processor module, based on LS1046ardb,
with an additional parallel NOR flash and SD card
We can boot a uboot from SD card, built with LS1046ardb_sdcard_defconfig without any problems.
at bootloader CLI we can erase/program the NOR flash,
flinfo shows correct type of component, that means hardware is ok.
Now we want to boot from NOR, we commented out "CONFIG_SD_BOOT=y"
and changed "CONFIG_SYS_TEXT_BASE=0x60100000",
because NOR is configured to IFC 0x60000000
1. question,
after compiling the scripts doesn't generates
u-boot-with-spl.bin and u-boot-with-spl-pbl.bin, which contains rcw+pbl+uboot.
it generates only u-boot.bin, u-boot-dtb.bin, u-boot-nodtb.bin
2. we used a rcw in processor.pe project, based on the rcw for sd card boot and changed PBI_SRC to IFC only, and programmed rcw to 0x60000000 and
u-boot.bin to 0x60100000,
no success
3. do we have to add the additional PBI data, stored in ls1046ardb_pbi.cfg ?
4. Where we have to configure the PBL to find the bootloader entry at 0x60100000 ?
Thanks for any hints,
Mike
Solved! Go to Solution.
LS1046AQDS integrates IFC NOR flash boot, you could customize your source code referring to ls1046aqds.
Please refer to include/configs/ls1046aqds.h and configs/ls1046aqds_defconfig in u-boot source code.
1. When comping IFC NOR flash u-boot, only u-boot image is generated, which doesn't include RCW+PBI. You need to program PBL(RCW+PBI) image separately.
2. I attached rcw source code from LSDK 2012 to you, you could refer to ls1046aqds/RR_FFSNPNNN_1133_8888/rcw_1600.rcw to customize your RCW file.
3. Please refer to the following PBI command in ls1046aqds/RR_FFSNPNNN_1133_8888/rcw_1600.rcw.
#include <../ls1046ardb/cci_barrier_disable.rcw>
#include <../ls1046ardb/usb_phy_freq.rcw>
#include <../ls1046ardb/uboot_address.rcw>
#include <../ls1046ardb/a008851.rcw>
#include <../ls1046ardb/a010477.rcw>
#include <../ls1046ardb/a009531.rcw>
4. You need to include ls1046ardb/uboot_address.rcw to add the following PBI commands.
.pbi
write 0x570600, 0x00000000
write 0x570604, 0x60100000
.end
LS1046AQDS integrates IFC NOR flash boot, you could customize your source code referring to ls1046aqds.
Please refer to include/configs/ls1046aqds.h and configs/ls1046aqds_defconfig in u-boot source code.
1. When comping IFC NOR flash u-boot, only u-boot image is generated, which doesn't include RCW+PBI. You need to program PBL(RCW+PBI) image separately.
2. I attached rcw source code from LSDK 2012 to you, you could refer to ls1046aqds/RR_FFSNPNNN_1133_8888/rcw_1600.rcw to customize your RCW file.
3. Please refer to the following PBI command in ls1046aqds/RR_FFSNPNNN_1133_8888/rcw_1600.rcw.
#include <../ls1046ardb/cci_barrier_disable.rcw>
#include <../ls1046ardb/usb_phy_freq.rcw>
#include <../ls1046ardb/uboot_address.rcw>
#include <../ls1046ardb/a008851.rcw>
#include <../ls1046ardb/a010477.rcw>
#include <../ls1046ardb/a009531.rcw>
4. You need to include ls1046ardb/uboot_address.rcw to add the following PBI commands.
.pbi
write 0x570600, 0x00000000
write 0x570604, 0x60100000
.end
Hello,
problem SOLVED:
we setup a debug session with CodeWarrior TAP and figured out a wrong string at:
CONFIG_DEFAULT_DEVICE_TREE, corrected to:
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" and then bootloader starts in NOR.
just answer myself:
SPL option is not necessary, because processor can run directly from memory-mapped device, the parallel NOR flash
Thanks again and regards,
Michael
Hello,
thanks for the hints
regarding
1. understood, we build the rcw with eclipse QorIQ, added all PBI commands,
according to ls1046aqds_pbi.cfg, just changed the bootloader entry to 0x6010000
and program separately at 0x60000000
it seems to work, processor accept it and turns off the asleep LED
2. We built the uboot based on SDK20, make ls1046aqds_defconfig, make,
just modified our I2C SPD address to 0x50
program u-boot.bin to 0x6010000, no serial output after power cycle,
3. Does the DDR4 has to be initalized before we see the first messages, like this ?
U-Boot 2018.03-00002-gc7a1f2d3e4-dirty (Nov 22 2021 - 16:01:37 +0100)
SoC: LS1046AE Rev1.0 (0x87070010)
we thought DDR init comes later, right ?
4. Don't we need a SPL version of uboot ?
when we boot from SD card, we see a double boot, first with
U-Boot SPL 2018.03-00002-gc7a1f2d3e4-dirty
it inits the DDR and then the bootloader starts again with:
U-Boot 2018.03-00002-gc7a1f2d3e4-dirty
Thanks for help,
Michael