A Question About GPIO1 On The LS1021ATWR Development Board

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A Question About GPIO1 On The LS1021ATWR Development Board

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patrickmorrow
Contributor III

Hi everybody,

We have a (hopefully) quick question about GPIO support on the LS1021a-twr development board.  Specifically GPIO port 1.  We've created a project in codewarrior for us to try to wiggle the pins on GPIO1, specifically pin GPIO1[15], but we don't seem to see any change on the various GPIO1 registers located at memory offset 0x02300008 (even after setting the GPIO1 DIR pins to outputs).  We're able to change the direction and data of GPIO3 (memory address 0x02320000), but not GPIO1, which is the one that we kind of need at the moment.

We are currently loading the RCW and U-Boot image from SD card.  We believe we have disabled all the UART support properly, in order for the GPIO pins to be set up as, well, GPIO.  The RCW we're using is as follows:

0608000a 00000000 00000000 00000000

20000000 00407900 60025a00 21046000

00000000 00000000 00000000 21000000

20024800 24bb1540 00000000 00000000

Is there any field that we may have missed that is needed to support all GPIO ports?  Or is there some flag needed when compiling the U-Boot image that will enable all GPIO ports?

Patrick

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alexander_yakov
NXP Employee
NXP Employee

LS1021A Reference Manual, Table 4-15 "RCW Field Descriptions", the description of the "UART_BASE" field has the following note:

NOTE: Note that UART_EXT field must be set to all

0's for UART_BASE to take effect.

In your case UART_EXT seems to be set to "100" if my calculations are correct

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alexander_yakov
NXP Employee
NXP Employee

LS1021A Reference Manual, Table 4-15 "RCW Field Descriptions", the description of the "UART_BASE" field has the following note:

NOTE: Note that UART_EXT field must be set to all

0's for UART_BASE to take effect.

In your case UART_EXT seems to be set to "100" if my calculations are correct

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