This project explains how to build and deploy u-boot for platforms using the LPC177x_8x devices. To build u-boot, you will need to system running the Linux operating system, that latest CodeSourcery GNU tools for the Linux OS, the u-boot source code, and the u-boot patch(es) for the LPC1788. Feaures implemented -------------------------------------------------------------------------------- Support for the EA1788 board with 32-bit DRAM (32MB) Support for the EA1788 board's NAND FLASH Support for the LPC177x_8x internal FLASH Ethernet support Limited MPU support u-boot known issues -------------------------------------------------------------------------------- Issue: 'reset' command causes the board to crash Workaround: Use 'cmreset' command instead Issue: 'boot' command causes the board to crash Workaround: Use environment variables and scripting with go command instead Issue: bootvx command causes board crash Workaround: None, but there is no reason to use this command Feaures not implemented -------------------------------------------------------------------------------- FLASH 'protect' command and features are not implemented (easily implemented) Interrupt/NVIC support not implemented (easily implemented) Possiible improvements -------------------------------------------------------------------------------- Systick can be used instead of the LPC1788 match timer The relocation code has been 'worked around' and is not implemented correctly A macro file for device spcific IRQs ie needed with weak links to be included in the startup file (arch specific with device overrides) A basic MPU driver is there and seems to work, but could be improved The ethernet driver and PHY setup are 'board specific', but could be moved to the drivers area and the generic PHY support could be used u-boot operational bootup overview -------------------------------------------------------------------------------- Here is an overview of how u-boot boots on the LPC1788. - LPC1788 boot ROM transfer control to u-boot code in internal FLASH at address 0x0 per CM3 bootup procedure - u-boot code first sets up the MPU - Pin muxing, clocking, and DRAM are all initialized - Code and data are relocated from FLASH to DRAM - BSS segment is cleared in DRAM - Control is transferred to u-boot code in DRAM - u-boot board_init_f() is called which does initial u-boot setup - board_init_r() is called for later u-boot setup - u-boot operates normally out of DRAM Location of the ported files -------------------------------------------------------------------------------- arch/arm/cpu/cortex-m3 - Cortex M3 specific files (mpu, startup, etc.) arch/arm/cpu/cortex-m3/lpc1788 - LPC1788 specific files (timer, serial, etc.) arch/arm/include/asm/arch-cortex-m3 - Cortex M3 header files arch/arm/include/asm/arch-lpc17xx - LPC177x_8x specific header files board/nxp - board specific area for board using NXP devices board/nxp/ea1788 - EA1788 board specific files (setup, nand, etc.) include/configs/ea1788.h - EA1788 board specific configuration file

Build procedures Open the M0 and M4 projects by clocking on the uvproj files. Make sure the 'iram' version of the project is selected in the target seleciton window. Select the Build target item from the Project menu to build the images. Build the M0 version of the project first, as the M0 binary is used for the M4 version. The FLASH version of the project works the same way as the IRAM version, but runs out of FLASH while using IRAM for RW data. When building the FLASH version, make sure both the M0 and M4 binaries are built using the FLASH configuration. Build the M0 version first, and then the M4 version. The BOOT1 to BOOT4 jumpers on the Hitex board should be setup as BOOT1-1-2, BOOT2-2-3, BOOT3-2-3, and BOOT4-1-2. Opened M0 project shown below Opened M4 project shown below Start the debug session Connect the Keil ULink2 JTAG debugger to the Hitex LPC4350 board's 10-pin JTAG connector. Power up the board by plugging in a 5.0v supply into the power plug (X14). On my board, the boot configuration was set as follows: BOOT1-1-2, BOOT2-2-3, BOOT3-2-3, BOOT4-2-3. Make sure the JTAG is setup correctly for dual-core debugging. In the M4 project window, select the Start/stop Debug Session item from the debug menu to load the image into the board. The image should load and run until the main() function. At this point, you can select run from the debug menu to start the M4 core. The M4 core will initialize the system and board and boot the M0 core. Both the M0 and M4 core will be running FreeRTOS and the red, blue, and green LEDs will start blinking. Let the M4 core run for a few seconds and then select stop from the debug menu. The red LED will stop blinking (indicating the M4 core is stopped), while the blue and green LEDs will continue blinking. After a short time, the green LED will quit blinking and only the blue LED will blink. The green LED is controlled by the shared memory queue the M4 core populates. When the M4 core was stopped, the filling of the queue on the M4 side was stopped, so the M0 core continued processing what was left in the queue until it ran out on entries. Restart the M4 core and both the red and green LEDs will start blinking again. Stop the M4 core and wait until the green LED stops blinking. Leave the M4 core stopped and switch to the M0 project. Select Start/stop Debug Session item from the debug menu to connect to the running process. The M0 core will stop once you do this. Make absolutely sure that the debug options for loading the image into memory or altering system configuration via the linker init file are dsiabled, as we don't want to reload and restart the process that was kicked off from the M4 core. At this point, both the M0 and M4 debug sessions are halted. You can start and stop or single step via each session independently! Select run from the M0 or M4 sessions' debug menu to restart only that core. Depending on which core you've started, the red or blue LED (and possibly green for the M0 core if the queue has data) will start blinking. You can view the state of shared memory queue in real-time by opening a memory window and typing in the address 0x10080000. You'll see the M4 and M0 indexes incrementing.

1.      Important Notes     1.    Please read the build section of Libraries and Example before building anything     2.    Never give batch build with all the items selected.     3.    When building an example make sure the M0 image is built and ready before building the M4 image     4.    Read the latest release notes before proceeding with this document 2.      Introduction This document will provide the instructions and information required to use the LPC43xx dual core demos. The source files can be either obtained from the git server or can be downloaded attached as a compressed zip file. 2.1     Dual Core in LPC43XX The LPC43xx is an ARM M4/M0 based dual core microcontroller. The SoC comes with Internal IRAM/Flash of various sizes. Please read the LPC43xx user manual and the board user manual carefully before starting to use the dual core demos on any of the LPC43XX board. 2.2     Hardware requirements Keil MCB4300 Development board Serial cable or USB to serial port dongle Keil uLink-2 or Keil uLink-Pro or Segger J-Link debugger (for ARM Cortex M devices) Development PC/Laptop (Host Machine) Keil uVision IDE MDK-ARM tool-chain (version 4.54 or above) Terminal emulation software (Teraterm recommended) Windows OS in which Keil tool can run (Windows 7 recommended) 2.3     Software requirements 3.      Directory Structure The software has two main directories, the “library” directory and the “applications” directory. It follows the same directory structure as followed by the “NXPUSBLibrary”. Inside the “applications” directory is the main Keil multi project workspace LPC43xx_Demo_Examples.uvmpw could be found as shown in Figure 1: Directory structure of LPC43xx Dual Core Demo Examples. The library directory has the following libraries[1] in it CDL (for LPC43XX) BSP (for KEIL MCB4357 board) nxpUSBLib (for Host and Device) FreeRTOS IPComm The example directory will have both the nxpUSBlib, and the MultiCore examples. This document will only have the details about the MultiCore examples. The Following MultiCore examples can be found under examples directory. Common (Not an example in itself but is used by all the examples) USB_KBD_HostBlinky) USB_MS_Device (USB Mass Storage device and Blinky) 4.      Libraries 4.1     Building Library Open the Keil uVision multiple project workspace by double clicking on the “LPC43xx_Demo_Examples.uvmpw”. The project workspace opens in the uVision IDE, as shown in Figure 2: LPC43xx_Demo_Example in Keil uVision Workspace. For building the libraries it is recommended to use the batch build option provided by Keil. Select “Project” from the menu (on top of the IDE), followed by “Batch build…”, which will open the batch build window as shown in Figure 3: Batch build dialog. To build a specific library all the other selections must be cleared, this can be done by clicking on “Deselect All” button located in the left side of the dialog. Now to build, say CDL library, the appropriate library configurations must be selected [Example, for CDL “LPC43xx_M4 and LPC43xx_M0” must be selected]. Clicking the build button located at the top left side of the dialog will build the selected library. Each project is provided with a README.TXT file that will help the user to know more about the various configurations and how to use them. The library can also be built configuration by configuration. To do so, one must first make that project active by right clicking on the library and selecting the “Set as Active Project” from the menu that pops up (marked red in Figure 4: Setting active Project and Configuration), now select a configuration from the pull down menu (marked as green in Figure 4: Setting active Project and Configuration). Once the active configuration is selected press “F7” key to start the build process of the active configuration. After successful build select the next configuration and start the build process. 4.2     CDL (Common Driver Library) 4.2.1     Description The common driver library (CDL) will have the functions with which can be used to initialize and operate on any peripheral present in the SoC. It has files that implements functions for each peripheral (lpc43xx_uart, lpc43xx_i2c etc,). The CDL also has the CMSIS sources which will have the startup code required for starting up of the SoC. The CMSIS library has 2 startup files (lpc43xx_startup.S and lpc43xx_startup_m0.S) for Cortex M4 core and Cortex M0 core respectively. 4.2.2     Configurations The CDL supports two configurations (LPC43xx_M4 and LPC43xx_M0) one for each core 4.2.2.1     LPC43xx_M0 This configuration will build the library that could be linked and used with application that is meant to run on M0 core. This library will have the startup code for M0 core. If the users want to develop a new module they must keep in mind that all the IRQ handler names are prefixed with “M0_”. 4.2.2.2     LPC43xx_M4 This configuration will build CDL library, so that it can be linked and used by applications that are compiled for M4 core. 4.2.3     Output Files All output files (including the object and list files) will be located under “keil_ouput” directory of the corresponding library/example CDL_LPC43xx_M4.lib – Generated by building CDL for “LPC43xx_M4” configuration CDL_LPC43xx_M4.lib – Generated by building CDL for “LPC43xx_M0” configuration 4.3     BSP (Board Support Package) Library 4.3.1     Description This library has the functions required to initialize the board specific features. For example the external Flash, external DRAM, pin mux, LEDs etc. This library implements the bsp_init API that initializes the board (Recommended to call only from M4 core). This library supports two boards HITEX LPC4350 and KEIL MCB4357. The user must build the configurations only for the relevant board. Say, for example the users of HITEX 4350 board must build only HITEX4350_M0 and HITEX4350_M4, and should not build anything else. The board configuration that was build last (M0 and M4) will be considered for linking with any application. 4.3.2     Configurations For batch building of this library it is recommended to build only two configurations (M0, M4) that belongs to the same board. 4.3.2.1     MCB4300_M0 This configuration will build the BSP library for MCB4300 board and will provide functions that can be called from M0 core. This configuration must be built only along with MCB4300_M4 and not with any other configuration. 4.3.2.2     MCB4300_M4 This configuration will build the BSP library for MCB4300 board and will provide functions that can be called from M4 core. This configuration must be built only along with MCB4300_M0 and not with any other configuration. 4.3.3     Output Files BSP_LPC43XX_M4.lib – Library generated by building MCB4300_M4 configuration BSP_LPC43XX_M0.lib – Library generated by building MCB4300_M0 configuration Since we do not generate separate libraries for each board the configuration build recently will be taken for linking with the example applications. 4.4     nxpUSBlib (NXP’s USB Library) 4.4.1     Description This library provides the USB host/device support for LPC USB based microcontrollers. The original source of this library can be found at www.lpcware.com. But it is recommended to use the sources provided along with the dual core examples (Has some bug fixes and routines required for dual core operation of this library). For more information refer to document that comes along with the library. 4.4.2     Configurations For batch building this library it is recommended to select all the configurations. LPC43xx_Host_M0 – Configuration that builds USB host stack for M0 core LPC43xx_Device_M0 – Configuration that builds USB device stack for M0 core LPC43xx_Host_M4 – Configuration that builds USB host stack for M4 core LPC43xx_Device_M4 – Configuration that builds USB device stack for M4 core 4.4.3     Output Files nxpUSBlib_LPC43xx_Host_M0.lib – Created by building this library for configuration LPC43xx_Host_M0 nxpUSBlib_LPC43xx_Device_M0.lib – Created by building this library for configuration LPC43xx_Device_M0 nxpUSBlib_LPC43xx_Host_M4.lib – Created by building this library for configuration LPC43xx_Host_M4 nxpUSBlib_LPC43xx_Device_M4.lib – Created by building this library for configuration LPC43xx_Device_M4 4.5     FreeRTOS 4.5.1     Description This library is compiled of the FreeRTOS source obtained from www.freertos.org. Minimal modifications had been made to the OS files so that they will work on LPC43xx in both the cores. For more information about FreeRTOS refer www.freeRTOS.org 4.5.2     Configuration For batch building it is recommended to select all the configurations. 4.5.2.1     LPC43xx_M0 This configuration will compile FreeRTOS library from the sources that could be run from M0 core of LPC43xx. When this configuration is selected the FreeRTOS source will read its configuration header from lpc43xx_m0_FreeRTOSConfig.h kept under config directory of the FreeRTOS library, and will use RITIMER hardware to generate the system ticks. 4.5.2.2     LPC43xx_M4 This configuration will compile FreeRTOS library from the sources that could be run from M4 core of LPC43xx. When this configuration is selected the FreeRTOS source will read its configuration header from lpc43xx_m4_FreeRTOSConfig.h kept under config directory of the FreeRTOS library. 4.5.2.3     Output Files FreeRTOS_LPC43XX_M0.lib – Generated by building the library using LPC43xx_M0 configuration. FreeRTOS_LPC43XX_M4.lib – Generated by building the library using LPC43xx_M4 configuration. 4.6     IPComm (Inter Processor Communication Library) 4.6.1     Description This library provides the functions to communicate between cores (M0/M4). This is required for the applications running on both the cores. For more information about this library and usage refer Application Note AN11177: Inter Processor Communications. 4.6.2     Configuration It is recommended to select all the configuration during the batch build. Standalone_M0 – Building IPC library for this configuration will generate IPC functions without support from any OS and can run on M0 core Standalone_M4 – Building IPC library for this configuration will generate IPC functions without support from any OS and can run on M4 core FreeRTOS_M0 – Building IPC library for this configuration will generate IPC functions with FreeRTOS support and can run on M0 core FreeRTOS_M4 – Building IPC library for this configuration will generate IPC functions with FreeRTOS support and can run on M4 core 4.6.3     Output Files The following are the output files generated for the above configurations respectively IPC_noOS_M0.lib IPC_noOS_M4.lib IPC_FreeRTOS_M0.lib IPC_FreeRTOS_M4.lib 5.      Examples 5.1     Setting up of board and debuggers This section provides information about setting up of various board to execute the dual core examples. For now the examples support only HITEX4350 and MCB4300 boards. 5.1.1     Setting up MCB4300 board Follow the steps below to setup the KEIL MCB4300 board to run the dual core examples Connect the U-Link/J-Link debugger’s 10-Pin debug port header to J6 port of the board. Connect the debugger to the Host PC using USB cable provided with the debugger (Debugger’s power LED should be lit after connecting) Connect a Serial cable (Straight cable) to the board’s P11 (UART0/3) port and connect the other end to the host PC Open teraterm select the COM port corresponding to the Serial Port to which the board is connected, select 115200 as the baud rate and no flow control Connect the USB cable’s[2] (Type-A to Micro-B) Micro-B end to the board’s Micro-B receptacle P2 (USB0) [Not to P4 USB1] Connect the Type-A end of the USB cable to the host PC (now the board should power ON) 5.1.2     Setting up Examples for debugging The following steps must be executed for all the examples. It must only be carried out for M4 targets and need not have to be done for any M0 target. It is applicable only for the examples and not for the libraries. Select the example as active project by right clicking on it (Circled red in Figure 4: Setting active Project and Configuration) Select the M4 configuration from the configuration selection pull down menu (Circled green in Figure 4: Setting active Project and Configuration) In the project view (Located in the left side of the IDE), expand the active example by clicking on it and click on the configuration (shown with a folder icon) Press “Alt” key and while holding it Press and release “F7” key, this will show the options dialog for the currently selected M4 configuration 6.     Now configure your debugger as shown in the figure (Red circles in Figure 5: Debugger configuration in Keil uVision)5.     Click on the “Debug” tab located on the top of the dialog (Blue circle in Figure 5: Debugger configuration in Keil uVision) Click on the Settings button (Green circle in Figure 5: Debugger configuration in Keil uVision) to open the debugger hardware configuration dialog as shown in Figure 7: U-Link debugger Hardware settings Setup the configuration[3] (shown in red circles) in the dialog as shown in Figure 6: U-Link debugger Hardware settings Click OK to save the configuration and close the dialog                                                10.  Now click on the utilities tab at the top of the options dialog (Tab next to the blue circled debug tab in Figure 5: Debugger configuration in Keil uVision) Now the window will look as shown in Figure 7: Keil flash configuration utility window Setup the configuration (red circled) in the utility window as shown in Figure 7: Keil flash configuration utility window Click the settings button (Green circled in Figure 7: Keil flash configuration utility window) That will open the Flash driver setup window as shown in Figure 8 Select the configuration (Red circled) as shown in                                                         Click on the add button (Green Circled in Figure 8: Flash driver configuration window) That will open the flash programming algorithm select window as in Figure 9: Flash Programming Algorighm select window In the flash programming algorithm window select SST39VF3201x[4] and click “Add” button in Figure 9: Flash Programming Algorighm select window Repeat Step 16 to 18 for LPC18xx/43xx IAP 512kB for both 1A000000 and 1B000000 address range Click OK (Blue circled) as shown in Figure 8: Flash driver configuration window Press OK in Keil flash configuration utility window to save the configuration and exit the options window Repeat the steps for all the examples for all the M4 configurations                                                               5.1.3     Building & Executing Examples Every example will have a set of M0 configuration and M4 configurations, the user must build the M0 configuration first and then the corresponding M4 configuration. For compatible configurations please refer to the configuration table provided under each example. Once both M0 and the corresponding M4 images are built click on the debug button   to start the debugging. Press “F5” key to execute the code. 5.2     Blinky Example 5.2.1     Description This example blinks the LED1 (Red LED in HITEX board) and LED2 (Green LED in HITEX board). The M4 core pushes the LED1 turn ON/OFF message at an interval of every 500 milliseconds and the message is popped by M0 core and based on the message it turn ON/OFF LED1. The same way M0 core pushes LED2 ON/OFF message and is popped by the M4 core and blinks the LED2 accordingly. So, on both the cores there will be two tasks running one pushes the message another pops and executes the command present in the message. 5.2.2     Configuration M4 Configuration M0 Configuration Remarks Standalone_M4 Standalone_M0 FreeRTOS_M0 All configurations possible FreeRTOS_M4 Standalone_M0 FreeRTOS_M0 All configurations possible Table 5‑1: Blinky Example configuration 5.2.3     Expected Output LED1 and LED2 blinks at different rates. 5.3     USB Host Stack Example (with Keyboard class driver) Description This example runs the USB Host stack in any of the core with the keyboard class driver. The stack running in any core will receive the keystroke and will push it to the other core via message queue. The other core will receive the message and print the key pressed to UART. It then sends an acknowledgement message to theblinky task running along with the USB host stack to toggle an LED. 5.3.1     Configuration M4 Configuration M0 Configuration USB_noOS_M4 Blinky_noOS_M0 Blinky_FreeRTOS_M0 USB_FreeRTOS_M4 Blinky_noOS_M0 Blinky_FreeRTOS_M0 Blinky_FreeRTOS_M4 USB_noOS_M0 USB_FreeRTOS_M0 Blinky_noOS_M4 USB_noOS_M0 USB_FreeRTOS_M0 Table 5‑3: USB Keyboard demo configurations 5.3.2     Expected Output Blinks LED1 and LED2, connecting the keyboard to the host port will print the message keyboard enumerated on the COM port. Any key pressed in the keyboard will be printed on the teraterm. Key press will also toggle LED3. 5.4     USB Device Stack Example (Mass Storage Device Class) 5.4.1     Description This example will run the USB device stack (Mass storage class) in any core while running the Blinky on both the cores. This example also has the FAT file system parser for getting the data present in the file storage area. 5.4.2     Configuration Same as USB Keyboard demo configurations 5.4.3     Expected Output The Host PC will enumerate the board as a USB disk and will contain a README.TXT that carries the text “USB Device demonstration”. LED1 and LED2 will be blinked by the Blinky tasks. The Mass Storage task will toggle the LED3 for every SCSI command it receives.

Introduction This page gives more detailed information on how to use the IOH libraries in custom projects when using the IAR EWARM IDE. For more general information regarding using IOH libraries in custom project or for detailed instructions for LPCXpresso and Keil, visit IOH: Getting started with IOH in custom projects. Ready-to-use examples can be found at the main I/O Handler page. Note: This guide assumes the IOH I2S library is to be added to a project, hence the 'I2S' references. For other IOH libraries, 'I2S' should be replaced with the library name. 1. Add the IOH library (ioh_*_iar.a) to the project The first step is to configure the IAR project to link against the IOH library. This can be done by simply adding the .a file to the project. 2. Add the path where the library's header file resides to the project’s include path The next step is to add the file location of the library's header file to the include path of the project. Open the project options and browse to the category 'C/C++ Compiler', then to the tab 'Preprocessor'. Add the location of the header file to the 'Additional include directories'. 3. #include the IOH header file in the source code of the application The IOH header file must be included in the source code of the project (e.g. main.c) by using the following preprocessor directive: #include "IOH_I2S.h" 4. Configure the linker to place the IOH related sections in the IOH SRAM All IOH parts have an SRAM region reserved for I/O Handler. When starting IOH, usually by calling the library's init() function, I/O Handler expects this memory region to be loaded with the IOH data provided by the IOH library. This means this data must be stored in Flash and copied to the IOH SRAM upon startup. A convenient way to do this, is by using scatter loading. With scatter loading, the linker and c-library are instructed to program certain data sections (IOH data) into Flash, and copy it to the specifed region (IOH SRAM) upon start up. This requires a linker script. The linker script can be added to the IARproject by opening the projects options and browsing to the 'Linker' category. First check the 'Override default' checkbox, then add the file location to the 'Linker configuration file' box. Following is the part of the linker script used for the LPC11U37H, responisble for placing the IOH sections in the SRAM1 region (IOH SRAM): define symbol __IOHRAM_start__ = 0x20000000; define symbol __IOHRAM_end__   = 0x200007FF; define region IOHRAM_region = mem:[from __IOHRAM_start__ to __IOHRAM_end__]; initialize by copy { section .ioh_text }; initialize by copy { section .ioh_constdata }; initialize by copy { section .ioh_data }; place in ROM_region { section .ioh_text_init }; place in ROM_region { section .ioh_constdata_init }; place in ROM_region { section .ioh_data_init }; place in IOHRAM_region { rw section .ioh_text}; place in IOHRAM_region { rw section .ioh_constdata }; place in IOHRAM_region { rw section .ioh_data }; place in IOHRAM_region { rw section .ioh_bss }; 5. Enable the IOH SRAM (SRAM1) before C-library initialization The copying of data from the 'load region' to the 'execution region' when using scatter loading (explained above) is executed by the c-library just before main() gets called. It's important that both regions are enabled when the copying is initiated. After power-on, the IOH SRAM on the LPC11E/U37H is disabled (clock disabled in the SYSAHBCLKCTRL register), so it must be enabled before the scatter loading is initiated. The right place (assuming the CMSIS standard is followed) to enable the IOH SRAM, is in the SystemInit function. SystemInit() is called just before the C-enviroment is initialized as can been seen from the following snippet from the LPC11xx IAR startup file: PUBWEAK Reset_Handler SECTION .text:CODE:REORDER(2) Reset_Handler LDR     R0, =SystemInit BLX     R0 LDR     R0, =__iar_program_start BX      R0 Therefore the SystemInit() function should contain the code for enabling the IOH SRAM block, e.g. by adding the following line to the SystemInit() function (assuming the LPC11E/U37H): LPC_SYSCON->SYSAHBCLKCTRL |= (1<<26); 6. Interact with IOH via the library's API The final step is to interact from the application with IOH. This can be done through the library's API. Each library comes with an application note explaining how to use the library and what data structures and functions are available, and with one or more application examples showing how to use the library. This application note and application example provide an easy way to get started. They can be downloaded from the main I/O Handler page.

Introduction This page gives more detailed information on how to use the IOH libraries in custom projects when using the Keil MDK IDE. For more general information regarding using IOH libraries in custom project or for detailed instructions for LPCXpresso and IAR EWARM, visit IOH: Getting started with IOH in custom projects. Ready-to-use examples can be found at the main I/O Handler page. Note: This guide assumes the IOH I2S library is to be added to a project, hence the 'I2S' references. For other IOH libraries, 'I2S' should be replaced with the library name. 1. Add the IOH library (ioh_*_keil.lib) to the project The first step is to configure the Keil project to link against the IOH library. This can be done by simply adding the .lib file to the project. 2. Add the path where the library's header file resides to the project’s include path The next step is to add the file location of the library's header file to the include path of the project. Open the project options and browse to the tab 'C/C++'. Add the location of the header file to the 'Include Paths'. 3. #include the IOH header file in the source code of the application The IOH header file must be included in the source code of the project (e.g. main.c) by using the following preprocessor directive: #include "IOH_I2S.h" 4. Configure the linker to place the IOH related sections in the IOH SRAM All IOH parts have an SRAM region reserved for I/O Handler. When starting IOH, usually by calling the library's init() function, I/O Handler expects this memory region to be loaded with the IOH data provided by the IOH library. This means this data must be stored in Flash and copied to the IOH SRAM upon startup. A convenient way to do this, is by using scatter loading. With scatter loading, the linker and c-library are instructed to program certain data sections (IOH data) into Flash, and copy it to the specifed region (IOH SRAM) upon start up. This requires a linker script. The linker script can be added to the keil project by opening the projects options and browsing to the 'Linker' tab. First uncheck the 'Use memory Layout from Target Dialog' checkbox, then add the file location to the 'Scatter file' box. Following is the linker script used for the LPC11U37H, placing the IOH sections in the SRAM1 region (IOH SRAM): LR_IROM1 0x00000000 0x00020000  {    ; load region size_region   ER_IROM1 0x00000000 0x00020000  {  ; load address = execution address    *.o (RESET, +First)    *(InRoot$$Sections)    .ANY (+RO)       }   RW_IRAM1 0x10000000 0x00002000  {  ; RW data    .ANY (+RW +ZI)   }   RW_IRAM2 0x20004000 0x00000800  {  ; RW data    .ANY (+RW +ZI)   }   RW_IRAM3 0x20000000 0x00000800  {  ; RW data    .ANY(.ioh_text)    .ANY(.ioh_constdata)    .ANY(.ioh_bss)    .ANY(.ioh_data)   } } 5. Enable the IOH SRAM (SRAM1) before C-library initialization The copying of data from the 'load region' to the 'execution region' when using scatter loading (explained above) is executed by the c-library just before main() gets called. It's important that both regions are enabled when the copying is initiated. After power-on, the IOH SRAM on the LPC11E/U37H is disabled (clock disabled in the SYSAHBCLKCTRL register), so it must be enabled before the scatter loading is initiated. The right place (assuming the CMSIS standard is followed) to enable the IOH SRAM, is in the SystemInit function. SystemInit() is called just before the C-enviroment is initialized as can been seen from the following snippet from the LPC11xx Keil startup file: Reset_Handler   PROC EXPORT  Reset_Handler             [WEAK] IMPORT  SystemInit IMPORT  __main LDR     R0, =SystemInit BLX     R0 LDR     R0, =__main BX      R0 ENDP Therefore the SystemInit() function should contain the code for enabling the IOH SRAM block, e.g. by adding the following line to the SystemInit() function (assuming the LPC11E/U37H): LPC_SYSCON->SYSAHBCLKCTRL |= (1<<26); 6. Interact with IOH via the library's API The final step is to interact from the application with IOH. This can be done through the library's API. Each library comes with an application note explaining how to use the library and what data structures and functions are available, and with one or more application examples showing how to use the library. This application note and application example provide an easy way to get started. They can be downloaded from the main I/O Handler page.

Introduction This page gives more detailed information on how to use the IOH libraries in custom projects when using the LPCXpresso IDE. For more general information regarding using IOH libraries in custom project or for detailed instructions for Keil MDK and IAR EWARM, visit IOH: Getting started with IOH in custom projects. Ready-to-use examples can be found at the main I/O Handler page. Note: This guide assumes the IOH I2S library is to be added to a project, hence the 'I2S' references. For other IOH libraries, 'I2S' should be replaced with the library name. 1. Add the IOH library (libioh_*lpcxpresso.a) to the project The first step is to configure the LPCXpresso project to link against the IOH library. Open the project properties. Browse to 'Settings', then 'Libraries'. Add the library name (minus the 'lib' prefix) to the first box ('Libraries (-l)'), the library location to the second box ('Library search path (-L)'). 2. Add the path where the library's header file resides to the project’s include path The next step is to add the file location of the library's header file to the include path of the project. Still in the project properties, browse to 'Settings', then 'Includes'. Add the location to the 'Include paths (-I)' box. 3. #include the IOH header file in the source code of the application The IOH header file must be included in the source code of the project (e.g. main.c) by using the following preprocessor directive: #include "IOH_I2S.h" 4. Configure the linker to place the IOH related sections in the IOH SRAM All IOH parts have an SRAM region reserved for I/O Handler. When starting IOH, usually by calling the library's init() function, I/O Handler expects this memory region to be loaded with the IOH data provided by the IOH library. This means this data must be stored in Flash and copied to the IOH SRAM upon startup. A convenient way to do this, is by using scatter loading. With scatter loading, the linker and c-library are instructed to program certain data sections (IOH data) into Flash, and copy it to the specifed region (IOH SRAM) upon start up. This requires a linker script. When using LPCXpresso, this is taken care of automatically when selecting an IOH-enabled part and using the 'Manage Linker Script' option active 5. Enable the IOH SRAM (SRAM1) before C-library initialization The copying of data from the 'load region' to the 'execution region' when using scatter loading (explained above) is executed by the c-library just before main() gets called. It's important that both regions are enabled when the copying is initiated. After power-on, the IOH SRAM on the LPC11E/U37H is disabled (clock disabled in the SYSAHBCLKCTRL register), so it must be enabled before the scatter loading is initiated. The startup file included in LPCXpresso for IOH-enabled parts automatically enable the SRAM in time. 6. Interact with IOH via the library's API The final step is to interact from the application with IOH. This can be done through the library's API. Each library comes with an application note explaining how to use the library and what data structures and functions are available, and with one or more application examples showing how to use the library. This application note and application example provide an easy way to get started. They can be downloaded from the main I/O Handler page.

Introduction This page gives a quick overview of the available IOH libraries. A description of the library, its specifications and its requirements are summarized on this page. The the following downloads are attached to the community post below. Full library documentation. The IOH pre-compiled libraries. 1 or more application example source-code/projects per library (LPCXpresso, Keil MDK, IAR EWARM). The following libraries are currently available: Serial-interface emulation DALI I2S master I2C master UART CPU-cycle saving libraries CRC Windowed Comparator DMA The serial-interface emulation allows easy addition of one more serial interface to the LPC11x37H microcontrollers.The CPU-cycle saving libraries offer CPU-offloading for certain tasks, which can be used for lower power consumption (ARM core put in sleep mode), or for high performance (ARM executing other tasks in parallel). DALI The I/O Handler DALI library provides functionality to emulate a DALI master using the I/O Handler hardware block. DALI is a technical standard for network-based systems that control lighting in e.g. building automation. The IOH library allows to handle a large portion of the DALI standard autonomously by the I/O Handler peripheral with zero to very little CPU load.The library integrates a large portion of the DALI interface. The easy-to-use API is non-blocking and only passes the data to be transmitted to the I/O Handler.After a transfer has been initiated, the I/O handler takes care of the Manchester encoding and generation of edges on an I/O pin without any CPU involvement. The IOH ensures the mandatory wait time (settling time) between frames is honored and keeps track of the DALI input pin to watch for any response. Besides the supported polling mode to test if a transmission has finished, an interrupt is also generated at the end of every transmission. Data indicating whether the slave has send back a response and what this response is, can be accessed through another API call. Specifications Master mode only (a future library update may add slave support). Manchester encoding/decoding, pin I/O and settling time all handled by IOH with zero CPU load. Support for both polling mode and interrupt mode. Configurable Rx/Tx polarity. This allows using both inverting and non-inverting DALI bus drivers. Requirements Library is designed for the LPC11E37H and the LPC11U37H. Requires 1.5kB Flash storage. Counter/timer module CT16B1 is used by IOH and is no longer available to the ARM core. Pinning DALI Function Description Pin TxD DALI transmit data output PIO1_6/IOH_16 RxD DALI receive data input PIO1_7/IOH_17 I2S master The I/O Handler I2S library allows emulation of a basic I2S master (transmit only). I2S (Inter-IC Sound) is an electrical serial bus interface standard used for connecting digital audio devices together. It is used to communicate PCM audio data between integrated circuits in an electronic device. The IOH library allows emulation of a basic I2S master while not loading the CPU heavily with this task. The required CPU activity for this task is limited to ensure the data is available in the buffer in time for IOH to read it.After configuring and starting the I2S emulation, the I/O Handler continuously reads a 1kB data buffer and transmitting this buffer over the emulated I2S interface. After reading/transmitting the entire buffer, it wraps-around and begins reading/transmitting from the top of the buffer, thereby creating a continuous stream of data. An interrupt is asserted every time when the first half of the buffer has been read, and when the second half of the buffer has been read. This allows the CPU to fill the half of the buffer which is not being accessed by IOH with new data. Specifications Master mode only. Configurable for either I2S transmit or receive functionality (simultaneous transmit/receive not supported). 2 channels, 16-bit per channel. Loops over a 1kB data array. Requirements Library is designed for the LPC11E37H and the LPC11U37H. Requires 1kB Flash storage. Requires usage of one of any of the available timer modules (CT16B0, CT16B1, CT32B0 or CT32B1). Selected timer module is no longer available to the ARM core. Pinning I2S Function Description Pin SCL I2S bit-clock Any external match output pin of the selected timer (e.g. CT16B1_MAT0, CT32B0_MAT3, etc) WS I2S word-select output Configurable, following pins can be selected: IOH[7:0] TX_SDA I2S data output Configurable, following pins can be selected: IOH[7:0] RX_SDA I2S data input Configurable, following pins can be selected: PIO1_5/IOH_15 or PIO1_6/IOH_19 SCL_In I2S bit-clock input (requires to be connected externally to the SCL signal) Configurable, following pins can be selected: PIO0_8/IOH_6,  PIO1_6/IOH_16 or PIO1_27/IOH_20   I2C master The I/O Handler I2C library provides functionality to emulate an I2C master using the I/O Handler hardware block. The I2C bus was designed by Philips in the early ‘80s to allow easy communication between components which reside on the same circuit board. The IOH library allows I2C communication fully handled by IOH, with zero CPU load after a transfer has been initiated. The easy-to-use API is non-blocking and only passes the data to be transmitted to the I/O Handler.After a transfer has been initiated, the I/O Handler handles the full I2C transfer with zero CPU-load. The IOH interrupt is asserted when a transfer has been completed. The API supports functions like I2C write, I2C read and I2C read/write. Specifications Master mode only. Repeated start supported. Clock stretching supported. Bit rate up to 300Kbps for 48MHz CPU clock. Support for both polling mode and interrupt mode. Multi-master not supported. 10-bit address not supported. Requirements Library is designed for the LPC11E37H and the LPC11U37H. Requires 1.5kB Flash storage. Counter/timer module CT16B1 is used by IOH and is no longer available to the ARM core. Pinning I2C Functions Description Pin SDA I2C data input/output Configurable, following pins can be selected: PIO1_[31:0] SCL I2C clock output Configurable, following pins can be selected: PIO1_[31:0]     UART The I/O Handler UART library provides functionality to emulate a UART using the I/O Handler hardware block. The implemented UART is capable of full-duplex communication at common UART formats (7/8 databits, 1/2 stopbits), and with a configurable baud rate (up to 115200 baud). Flow control through hardware handshaking is supported (RTS/CTS). Receive and transmit FIFOs are configurable, and interrupts are generated based on FIFO thresholds. A low-level API offers receive and transmit primitives, as well as interrupt events. A sample driver demonstrates how to use this to create buffered I/O. Specifications Asynchronous, full-duplex. Baud rates up to 115200 for 48 MHz CPU clock. Data formats 7N1, 7N2, 8N1, 8N2. Hardware handshaking: CTS controlled by I/O Handler, RTS controlled by driver software. Requirements Library is designed for the LPC11E37H and the LPC11U37H. Requires 1.25 KiB Flash storage. Counter/timer module CT16B1 is used by IOH and is no longer available to the ARM core. Pinning UART Function Description Pin TXD UART transmit data output Freely selectable from the 21 possible I/O Handler pins IOH_0…IOH_20 RXD UART receive data input Can be selected from the following three pins: PIO0_8/IOH_6, PIO1_6/IOH_16, PIO1_27/IOH_20 CTS UART clear-to-send input Freely selectable from the 21 possible I/O Handler pins IOH_0…IOH_20. This signal is optional.   CRC The I/O Handler CRC library enables the I/O Hander hardware block as a CRC engine. A cyclic redundancy check (CRC) is an error-detecting code commonly used in digital networks and storage device to detect accidental changes to raw data. The IOH library allows CRC calculation to be performed by the I/O Handler peripheral with zero CPU load. Through the easy-to-use, non-blocking API of the library the emulated CRC engine can be configured, started and stopped.After a CRC calculation has been initiated, the IOH calculates the CRC over the raw data block with zero CPU load. When the calculation has finished, the IOH interrupt is asserted and the result of the calculation can be read through an API call. Specifications Supported polynomials: CRC-16-CCITT (x16 + x12 + x5 + 1) CRC-16-IBM (x16 + x15 + x2 + 1) Big endian and little endian data supported. Configurable seed. Support for both polling mode and interrupt mode. Requirements Library is designed for the LPC11E37H and the LPC11U37H. Requires 1kB Flash storage. Windowed Comparator The IOH windowed comparator allows monitoring up to 4 analog channels with zero CPU load. The ADC continuously converts all enabled channels, while IOH compares the converted values against a per-channel configurable window (consisting of an upper-limit and a lower-limit). When the converted value of any of the enabled channels is outside this window, an interrupt is generated. This task is fully handled by IOH at zero CPU load, meaning that in the meantime the ARM core can be put in sleep mode or execute other tasks. This provides a way to either lower the power consumption (ARM in sleep mode), or enhance performance (ARM executing other tasks). Specifications Converts up to all 8 available analog channels. Channel 0-3 can be selected for windowed comparator function. Interrupt is generated whenever any of the enabled comparator channels exceeds their window. True zero CPU-load. Requirements Library is designed for the LPC11E37H and the LPC11U37H. Requires 1.8kB Flash storage. ADC module is used by IOH and is no longer available to the ARM core. Note: Conversion result of enabled ADC channels available through API.

Introduction Adding IOH functionality to a custom project is not difficult, but does involve a few important steps. These steps are explained in more detail on this page. Since the implementation of most of the steps are IDE dependant, details for each supported IDE (LPCXpresso, Keil MDK, IAR EWARM) are given on seperate pages.   Steps in general In general, the following steps should be followed when using an IOH library in a custom project: 1. Add the IOH library (*.lib, *.a) to the project. 2. Add the path where the library's header file resides to the project’s include path. 3. #include the IOH header file in the source code of the application. 4. Configure the linker to place the IOH related sections in the IOH SRAM using our provided linker scripts (for LPCXpresso this step is performed automatically when an IOH enabled device is selected). 5. Enable the IOH SRAM (SRAM1) before C-library initialization (startup/system_init code). 6. Interact with IOH via the library's API.   Detailed instructions per IDE For more detailed, per IDE instructions, visit the pages below: LPCXpresso Keil MDK IAR EWARM

Introduction The IOH application examples provide a great and easy way to get started with I/O Handler. All provided IOH examples come with project files for LPCXpresso, Keil MDK and IAR EWARM. This page will give an overview on how to start exploring these examples. 1. Download the full IOH kit The first step is to download the full IOH kit. This kit contains: The IOH libraries. For every library one application note describing the library and the example application(s). One or more application example projects Download the full IOH kit attached Unzip the archive to e.g. C:/nxp/ 2. Open the project in the IDE The second step is opening the projects into the IDE. LPCXpresso: 1. Choose 'File'->'Import'. Then select 'General'->'Existing Projects into Workspace' 2. Select 'Select archive file' and click 'Browse'. Select the file 'lpcxpresso_nxp_lpcxpresso_11u37h.zip' which is in the unzipped folder       (e.g. C:/nxp/nxp_lpcxpresso_lpc11u37h_ioh/lpcxpresso_nxp_lpcxpresso_11u37h.zip) 3. Import all project into the workspace by clicking 'Finish'. Note: You may also choose to only import a selected number of projects. In that case, always                     make sure you import at least three project:      'lpc_chip_11uxx_lib', 'nxp_lpcxpresso_11u37h_board_lib' and the example project of interest. Keil MDK: In Keil, open the multi-project workspace located at: nxp_lpcxpresso_lpc11u37h_ioh\applications\lpc11xx\keil_uvision_projects\nxp_lpcxpresso_11u37h\nxp_lpcxpresso_11u37h_ioh_examples.uvmpw IAR EWARM: In IAR, open the multi-project workspace located at: nxp_lpcxpresso_lpc11u37h_ioh\applications\lpc11xx\iar_ewarm_projects\nxp_lpcxpresso_11u37h\nxp_lpcxpresso_11u37h_ioh_examples.eww 3. Building the project After successfullt importing the project into the IDE, the project can be build. LPCXpresso: Select the example project of interest and click the 'Build' icon. The chip and board project will be automatically be compiled. Keil MDK: 1. Right-click on the example of interest in the project explorer and select 'Choose as Active Project'. 2. Click 'Project'->'Batch Build...'. Select atleast the 'lib_lpc_chip_11uxx', 'lib_lpc_board_nxp_lpcxpresso_11u37h' and the project of interest. 3. Click 'Build'. IAR EWARM: 1. In the project explorer, select the project of interest from the drop-down list to make that project the active project. 2. Click 'Project'->'Batch build...' and then click 'Edit'. Select atleast the 'lib_lpc_chip_11uxx', 'lib_lpc_board_nxp_lpcxpresso_11u37h' and the project of interest as 'Configurations to build'. When done, press 'OK'. 3. Click 'Make'. Important: IAR EWARM may require an update and a patch. If this condition is not met, compilation (linking) will result in an 'internal error' message from the IAR linker. Please make sure you're running 6.70.1.5794 or higher and that you have installed the 'EWARM linker patch 6.70.2-5901'. Please check your IAR mypages for any available updates. 4. Flashing the binary into the board LPCXpresso: 1. Connect a USB cable to J6 of the LPC11U37H board. J6 is the Link-2 USB connector, which allows LPCXPresso to access the LPC11U37H target for programming and debugging. 2. Click the 'Debug' icon to launch a debug session. 3. click the 'Resume' icon to start code execution. Keil MDK: 1. Either: Configure the Link2 as CMSIS DAP/J-Link (click here for more details) and connect a USB cable to J6 of the LPC11U37H board. J6 is the Link-2 USB connector. Connect a supported external debugger to P1 2. Click the 'Load' icon in Keil to download the compiled binary into the board. 3. After download has finished, hit the reset button to run the example. IAR EWARM: 1. Either: Configure the Link2 as CMSIS DAP/J-Link (click here for more details) and connect a USB cable to J6 of the LPC11U37H board. J6 is the Link-2 USB connector. Connect a supported external debugger to P1 2. Click the 'Download and Debug' icon in IAR to download the compiled binary into the board and to start a debug session. 3. After download has finished, click the 'Go' icon to start code execution.

Introduction The LPC4088 based Closed Loop Payment demo shows how a basic closed loop payment system can be created using NXP’s ARM Cortex-M4 based LPC4088.  The leading industry-standard MIFARE contactless and dual interface smart card is used for payment and is fully compliant with ISO 14443A. A 7” 800x480 color touch-screen LCD functions as a graphical user interface (GUI). Using this graphical interface, the card can be queried, items to buy can be selected, and finally the user can proceed to checkout.  The GUI is build using emWin. NXP's CLRC663, a contacless reader IC, is used to interface with the MIFARE card. This demo also features the usage of the SPIFI peripheral. A 32Mbit QSPI FLASH chip is used for storing images used by the demo. Demo Video Links NXP Secure Transaction Website on EETimes LPCWare emWin project page NXP ARM Cortex-M4 Product Page NXP CLEV663B demoboard (Blueboard) Getting started with the RC663 Blueboard Embedded Artists LPC1788 Evaluation Board (LPC4088 OEM module required for this demo) Embedded Artists LPC4088 Developers Kit (Baseboard + LPC4088 OEM module) Embedded Artists 7" 800x480 color LCD Software Encryption Solutions

About FreeRTOS FreeRTOS™ is a market leading RTOS that is designed specifically for microcontrollers. It is professionally developed, strictly quality controlled, robust, supported, and free to use (no upfront payment, no royalties) in commercial products without any requirement to expose your proprietary source code. FreeRTOS receives in excess of 107,000 downloads a year, is deployed in millions of products, and has a huge user community. FreeRTOS offers lower project risks and a lower total cost of ownershipthan commercial alternatives because: It is fully supported and documented. Most people take products to market without ever contacting us, but with the complete peace of mind that they could opt to switch to a fully indemnified commercial license (with dedicated support) at any time. Resources: The FreeRTOS web site The FreeRTOS value proposition    FreeRTOS and LPCOpen FreeRTOS is an integral part of LPCOpen. Information and a video on using LPCOpen with FreeRTOS is provided in tutorial form on the FreeRTOS website. Resources: Information and tutorial on using FreeRTOS with LPCOpen    FreeRTOS kernel support for NXP MCUs FreeRTOS has comprehensive kernel support for NXP ARM core MCUs, including: LPC11xx Cortex-M0 LPC13/7/8xx Cortex-M3 LPC15xx Cortex-M3 LPC43xx Cortex-M4F / Cortex-M0 LPC2xxx ARM7 The main FreeRTOS .zip file download includes several pre-configured example projects for these devices. The intent of these projects is to provide an 'out-of-the-box' starting point, to get new users up and running as quickly as possible, and provide a base from which commercial projects can be developed. The example projects already include all the required source files, all the required include paths, all the required compiler options, and target one specific piece of hardware using one specific tool chain. A project cannot be provided for every possible combination, but using an existing project as a base for any new developments is still recommended even when an exact component or development board match cannot be found. Resources FreeRTOS demos for NXP parts on the FreeRTOS web site Additional FreeRTOS Products Supporting NXP MCUs FreeRTOS+FAT SL Free commercial licenses when used on NXP LPC17xx and LPC18xx MCUs! FreeRTOS+FAT SL is a market proven, DOS compatible, proprietary and supported FAT file system provided by HCC Embedded to Real Time Engineers Ltd for use with FreeRTOS or in bare metal systems. FreeRTOS+FAT SL is intricately engineered to minimise both Flash and RAM footprint. Other products in the file system family include both high performance and true fail-safe designs. Resources: Documentation, source code and FreeRTOS simulator project for the example demonstrated in the video Video: FreeRTOS+FAT SL and FreeRTOS+CLI in the FreeRTOS simulator Header 1 Header 2 FreeRTOS+UDP FreeRTOS+UDP is a small, fully thread aware, sockets based, and very efficient UDP/IP stack for FreeRTOS. It was created specifically for, and contains the features needed by, our new Internet of Things solution (currently being documented). The standard Berkeley sockets "like" interface makes it fast to learn and easy to use, and its compact size and efficiency makes it ideal for communication between small network enabled embedded devices. Resources: Documentation, source code and LPCXpresso project for the example demonstrated in the video Video: FreeRTOS+UDP and FreeRTOS+CLI on an LPC1830 FreeRTOS+CLI Free commercial licenses when used on NXP LPC17xx and LPC18xx MCUs! FreeRTOS+CLI (Command Line Interface) provides a simple, small, extensible and RAM efficient method of enabling your FreeRTOS application to process command line input. Resources: FreeRTOS+CLI documentation Featured FreeRTOS+IO and FreeRTOS+CLI Demo for LPCXpresso including networking and file system support Two comprehensive example projects are available that demonstrates FreeRTOS, FreeRTOS+IO and FreeRTOS+CLI being used on an LPCXpresso LPC1769 board, using the free LPCXpresso IDE. Examples include a telnet style command line interface to a file system, where directory listings can be viewed, and files can be copied and deleted. Resources NXP featured demo documentation NXP featured demo source code and project files TCP/IP libraries Low cost, professional, and fully featured IPv4 TCP/IP FreeRTOS libraries for the LPC176x are also available. Resources: FreeRTOS TCP/IP libraries for LPC17xx    FreeRTOS+Trace FreeRTOS+Trace is a trace tool for FreeRTOS that provides 15 graphically interconnected views for a world leading level of insight into the run-time behaviour of your FreeRTOS application. FreeRTOS+Trace includes recorder code for the LPC17xx, making it an indispensable debugging and optimisation tool for LP17xx based developments. Resources: FreeRTOS+Trace FreeRTOS+IO Free commercial licenses when used on NXP LPC17xx and LPC18xx MCUs! FreeRTOS+IO provides a Linux/POSIX like open(), read(), write(), ioctl() type interface to peripheral driver libraries, and is ported to the CMSISv2p00_LPC17xx library provided by NXP from this website. FreeRTOS+IO sits between CMSISv2p00_LPC17xx and a user application to provide a single, common, interface to all supported peripherals. The current LPC17xx board support package contains UART, I2C and SPI support, in both polled and interrupt driven modes. FreeRTOS+IO abstracts away the peripheral interface details, including the implementation of any interrupt service routines that may be required. Resources: FreeRTOS+IO documentation FreeRTOS+IO Board Support Package for the LPCXpresso base board

The LPC18xx/43xx DFUSec utility referred to in this article should NOT be used. It has been replaced by LPCScrypt. Use of LCT will result in a very old firmware version, which will contain bugs and not support some features in MCUXpresso IDE and 3rd party tools. This information is supplied for reference only. What does this tool do? The LPC18xx/43xx DFUSec utility is a Windows PC tool that provides support functions for LPC18xx/43xx microcontroller via USB. The tool is composed of 3 components: the Image Programmer, the LPC-Link 2 Configuration Tool, and the Security Support Tool (v2.00). This tool has been called the LPC18xx/43xx DFU Utility (DFUUtil) or DFUSec in versions prior to v1.10. DFUSec is the common name for the tool that covers all these components, For instructions on how to use a specific capability of the DFUSec tool, use the menu on the right.   Where to download and download pre-requisites Update: DFUSec and the LPC-Link 2 Configuration Tool are the same tool. Download DFUSec from the LCT link below and enable 'DFUSEC' mode by unchecking the Link2 lock button on the LCT file menu. As of v2.00 of the LCT, you no longer need to manually install .NET or the driver package - the installer will do that for you if it already isn't installed. WinUSB only needs to be installed on Windows XP machines - it is already part of Win 7/8. All you need to do is download and install the LCT. Before you can use DFUSec, you'll need to install WINUSB and the Microsoft.NET framework 4. DFUSec is available in pre-configured packages for the Image Programmer, Link Configuration Tool (LCT), and the (upcoming) Security Tool. (files attached)   Image Programmer The Image Programmer uses the USB DFU boot capability of the LPC18xx/43xx devices to program the internal FLASH or EEPROM, or the SPIFLASH on some boards. To do this, a small USB image is first downloaded to the board via USB using DFU and then it communicates with the PC application. To use the Image Programmer, the a USB port must be connected for USB boot with the LPC18xx/43xx device. Most commercial boards - such as boards from Embedded Artists, Hitex, Keil, and NGX - provide this support. The Image Programmer provides the following capabilities: In circuit programming and re-programming of internal FLASH and internal EEPROM on all LPC18xx/43xx devices via USB In circuit programming and re-programming of some SPIFLASH devices available on LPC18xx/43xx boards Smiple DFU download and execution of an image in IRAM with optional automated download whenever a board is plugged in Optional checksum generation at program time Boot header generation (needed by SPIFLASH or DFU boot) Sequenced program operations for complex image layouts across multiple storage (internal FLASH, internal EEPROM, SPIFLASH) types - a single session can quickly program all storage with a single automated USB sessions Extendable FLASH support - add support for other storage devices in the programming algorithm firmware LPC-Link 2 Configuration tool The LPC-Link 2 Configuration Tool is used to load firmware images onto the LPC-Link-2 board ir LPCXpresso V2 boards with the integrated LPC-Link 2 (LINK DFU) interface. This allows loading a firmware image that supports debugging via USB such as JLINK or CMSIS-DAP for development environments other than the LPCXpresso-IDE. To use the tool, select an image for a support LPC-Link 2 boards and follow the in-page instructions. Security Support Tool (upcoming) The Security Support Tool will be available with the DFUSec v2.00 release. This component of DFUSec adds the following capabilities: AES key management - key and vector generation, programming, and (limited) key retrieval Encrypted image generation with support for CMAC header Boot mode locking - disable JTAG, USB, or other capabilities for production systems Ability to encrypt FLASH binaries from Image Programmer to allow re-programming a secure board (if not locked)

This procedure no longer applies to DFUSec/LCT. As of v2.00 of the LCT, you no longer need to manually install .NET or the WinUSB driver package - the LCT installer will do that for you if it already isn't installed. WinUSB only needs to be installed on Windows XP machines - it is already part of Win 7/8. All you need to do is download and install the LCT. To install the WinUSB drivers for the LPC18xx/43xx boards, first configure the board for USB boot. Plug in the USB connector to the board (add external power to the board if necessary) and a new USB device (LPC) should appear. Download the drivers at http://www.lpcware.com/content/nxpfile/lpc18xx43xx-winusb-drivers-dfu-boot Un-compress the drivers and point the driver installation dialog to the INF file in the uncompressed package. After installation is complete, you should have a new device available for the LPC18xx or LPC43x.

Introduction The MicroCore48/64/100 has been developed to evaluate, test and demonstrate general purpose Microcontrollers from NXP Semiconductors.  The Microcore48/64/100 demo, evaluation and test board supports NXP’s 100 pin (or less) Cortex M0/M0+/M3 based microcontrollers (LPC800, LPC1100, LPC1200, LPC1300, LPC1500 and LPC2100 family).  Special adapter boards are available to support a wide range of ARM Cortex based microcontrollers in different packages, like: LPC81x LPC111x, LPC11A1x, LPC11Cxx, LPC11E1x and LPC11Uxx LPC131x and LPC134x LPC151x and LPC154x   Main features of the MicroCore48/64/100 - Wide supply range of 0V to 3.6V    o Via primary USB (Vbus) 3.3V    o Via secondary USB (Virtual COMM Port) 3.3V    o Via pins (f.i lab supply) 0 - 3.6V - Additional supply of 1.8V available - Exchangeable external crystal - Every pin of the Microcontroller contains a measure point and jumpers to (dis)connect it from the on-board peripherals - Serial In-System Programming (ISP) is possible - One RS232 buffered serial communication interface is provided to connect the MicroCore48 to a PC (or terminal) - USB communication port interface is implemented    o Soft or hardware USB connect possibility - USB to serial (Virtual COMM port) interface is implemented - I2C bus I/O expander and 256 bytes EEPROM is implemented - SPI bus Real Time Clock with temperature sensor, watchdog, time stamp and internal crystal is implemented - SPI bus RF module for wireless communication is implemented - CAN bus interface is implemented - Digital IO is implemented    o 3 push buttons, one with RC network and one for external RESET    o 8 LED’s (connected to I2C I/O expander) - Analogue inputs to micro’s AD converter    o 10k potentiometer is implemented to divide the 3.3V Vdd    o Photo transistor for ambient light sensing   Functional Blocks NXP’s Microcontroller Central part of the MicroCore64 board is the microcontroller. It can be mounted directly (at the LQFP64 footprint), with a test socket from Yamaichi type: IC149-064-69-B5 or with the use of an adapter board placed over headers X1, X3, X5 and X7. Every pin of the micro contains a  measure point and a jumper (at X2, X4, X6 and X8). This allows the user to connect or disconnect every single pin from the on-board peripherals and power signals. RS232 The MicroCore64 contains a MAX3232CSE device and a 9-pin sub D connector for the RS232 interface between a PC (terminal emulator) and the on-chip UART of the microcontroller. The RS232 port can be directly connected to a PC COMx port with a standard serial cable, with a female 9 pin sub D connector. Note that jumpers J2 and J3 have to be set correctly. I2C The MicroCore64 kit also contains an NXP - PCA9500 I/O expander and 256 bytes EEPROM with I2C bus interface. The PCA9500's I2C address is determined by both a fixed on-chip mask address and by external hardware wired links on the MicroCore64. These hardware wired links are all grounded, resulting in an I2C device address for the IO expander of 0x40 and an I2C device address for the EEPROM of 0xA0 All (eight) I/O port pins are used to drive LEDs. These are also connected to pin header X11, to optionally connect the LEDs directly to port pins of the Microcontroller. SPI0 The MicroCore64 kit contains an NXP - PCF2129A device (RTC) with SPI interface, connected to the on-chip SSP0 interface of the microcontroller. SCK is connected to pin 41, SDI to pin 37 and SDO to pin 36. Chip Enable (Slave Select) is software controlled and connected to pin 34. The PCF2129A Interrupt output, Clock output and the Time Stamp input are available at 3 pin header P4. SPI1 The board contains a connector (X15) for an RFM12 module from Hope. This module is a low cost ISM band FSK transceiver module implemented with unique PLL. It works within signal ranges from 315/433/868/915MHZ bands and complies with FCC and ETSI regulations. The SPI interface, used to interface with a microcontroller for parameter settings, is connected to the on-chip SSP1 interface (if available). SCK is connected to pin 57, MOSI is connected to pin 51 and MISO is connected to pin 35. SS_RFM is connected to pin 49. The interrupt request output is connected to pin 50. For more info about the RFM12 module visit: http://www.hoperf.com/rf_fsk/cob/RFM12.htm. USB (device) Some micro’s like the LPC1347 and LPC11U24 do have an on-chip USB device controller. For that reason the board contains a USB interface to connect it to a host. Next to a USB type B connector a switch for the soft connect feature of the micro is provided (Q1 – PDTA114 plus yellow LED D10). VBUS of this interface can be used to supply power to the MicroCore64 (check J1). Power The Microcore64 board can be powered in three ways. Either using VBUS (5V) of one of the two USB connectors (jumper J1 to determine, see figure above), or directly (using a lab supply) at the center pin of J1 or at the 3V3 and GND header pins (P2 and P3). If powered over VBUS then green LED D1 indicates power present. To support LPC2100 parts an additional 1V8 supply is available at the board (P7).   XTAL The external crystal is mounted on a 3 pin female header (Y1). Middle pin is connected to GND for easy interchanging crystals or resonators. The load capacitors C4 and C5 can be replaced by other ones by unsoldering/soldering. USB (VCP) The board contains an FT232RL device from FTDI to provide a USB virtual com port interface between a host PC and the on-chip UART of the micro. Note that jumpers J2 and J3 have to be set correctly. VBUS2 can be used to power the MicoCore64. VBUS2 is also used to generate a 1V8 supply, available at P7. This supply is needed to support LPC2100 devices (like LPC2129). CAN bus Parts like the LPC2119 have an on-chip CAN interface. To support CAN the board contains a TJA1040 CAN transceiver and a 9 pin male sub D connector. To connect the CAN pins of the micro pin header P5 can be used. To bypass the transceiver (for example with an LPC11C24) pin header P6 can be used. Analog Inputs The MicroCore48 board contains a 10k potentiometer (R20) to provide an analog input to the micro. This input is available at pin 44 of the micro (AD1 input). A second analog input signal is generated by a photo transistor (Q2 - BPW85C) and is available at pin 45 of the micro (AD2 input). This input can be used as a light sensor. RESET, BOOT and WAKE UP The MicroCore64 contains three pushbuttons. S1 (plus RC network) used as RESET, S2 used as BOOT (to force the micro into ISP mode) and S3 connected to pin 53 of the micro (could for example be used to wake up the micro from a power reduction mode). LED Indicators Besides the eight red LEDs connected to the I2C IO expander the MicroCore64 contains two additional red LEDs (D11 and D12) connected to pin 14 and pin 15 of the microcontroller. SWD (Serial Wired Debug) The MicroCore64 is equipped with the commonly used 10 pin SWD connector. The debug interfaces from Keil uLink and IAR / Segger JLink can be used with this board. For evaluation of LPC2100 devices a separate JTAG connector is provided at the socket adapter board.

Description This example implements an audio interface class device mode device that enumerates as audio device (USB speakers) and sends the samples sent to it from the host to the audio circuitry on the board.   Compiler build configurations The software that makes up this example is designed to run on many different development boards. Therefore the compiler must be configured to build an image that is targeted to the development board you are using. This section explains how to set these build configurations for each of the supported compilers. NOTE: read the Design notes section below if you are running this example on a part that supports high speed controllers.   LPCXpresso IDE   Configure projects   right click on the BSP project in the project explorer window   click Build Configurations->Set Active->(see configuration in table below)   repeat these steps with the CDL, nxpUSBlib, and Example_AudioOutputDevice   Configure MCU   right click on the Example_AudioOutputDevice project in the project explorer window   click Properties->C/C++ Build->MCU settings->(see configuration in table below)   Configure the indexer    click Window->Preferences->C/C++->Indexer->Use active build configuration BSP CDL nxpUSBlib Example_AudioOutputDevice MCU LPC1850  / Hitex LPC18xx_HITEX LPC18xx LPC18xx_Device LPC18xx LPC1850 LPC4330  / Xplorer LPC4330_Xplorer LPC18xx LPC18xx_Device LPC18xx LPC4330 LPC4350  / Element14 LPC1435_ELEMENT14 LPC18xx LPC18xx_Device LPC18xx LPC4350 NOTE: The LPC18xx CDL is used with boards that hold LPC43xx parts. This is done because the LPC43xx CDL is currently experimental. The LPC18xx USB library is used because both parts share the same controller.   Keil uVision 4 IDE Configure a Batch Build     click on Project->Batch Build...   expand the BSP project to display a list of project targets   select the project target by checking the appropriate checkbox (see target list in table below)   repeat these steps with the CDL, nxpUSBlib_Device, and Example_AudioOutputDevice BSP CDL nxpUSBlib_Device Example_AudioOutputDevice LPC1850  / Hitex HITEX1800 LPC18xx LPC18xx_Device HITEX1800   Board connections and configurations   LPC18xx_HITEX (LPC1850 Hitex Evaluation Board)  older A2 design schematic ./BSP/schematics/HITEX_SCM_LPC1850EVA-A2-2.pdf   Connect the JTAG to the 20 pin receptacle marked X4 JTAG Connect the type-B end of a USB cable to the receptacle marked X2. Plug the type-A end of this cable into a PC Connect the mini-phono plug on a pair of headphones to the receptacle marked HP   LPC18xx_HITEX (LPC1850 Hitex Evaluation Board)  newer A4 design schematic ./BSP/schematics/HITEX_Final_LPC1850EVA-A3.pdf LPC4330_Xplorer (NGX Xplorer Evaluation Board with LPC4330) Connect the JTAG to the 10 pin receptacle marked J2 Connect the micro-b end of a USB cable to the receptacle marked USB0. Plug the type-A end of this cable into a PC Connect the mini-phono plug on a pair of headphones to the receptacle marked J5 LPC1435_ELEMENT14 (Element 14 gaming board with LPC4350) Connect the JTAG to the 10 pin receptacle marked J6 Connect one end of a type-A to type-A USB cable to the receptacle marked USB0. Plug the other end of this cable into a PC Connect the mini-phono plug on a pair of headphones to the receptacle marked J1 PC configuration Use a PC running Windows XP, Vista or 7 Connect the type-A end of the USB cable that is connected to the board into one of the USB receptacles on the PC Build and debug the example LPCXpresso IDE In the project explorer window of the IDE right click on the Example_AudioOutputDevice project and select Debug As->C/C++ MCU Application In the main window of the IDE click Run->Resume to start running the application   Keil uVision 4 IDE In the Batch Build window, select the project targets as described in Compiler Build Configurations and then click Build In the main window of the IDE click Debug->Start/Stop Debug Session click Debug->Run   How this example runs and what to look for On the PC select Control Panel->Hardware and Sound->Sound When the example is first run a new entry in the Sound dialog box will appear titled Speakers and have a description that reads "4-nxpUSBlib Audio Out Demo". Below this description should be the word Ready.   To test the audio output click on this entry in the Sound dialog box. Then click on the Configure button to bring up the Speaker Setup dialog box. In this box press the Test button. Sound should be played through the left side of your headphones first, then the right side. Design notes This example is designed to run only at full speed. The nxpUSBlib runs the USB controllers on the LPC18xx and LPC43xx parts at high speed by default. This default must be changed to run this example properly on these parts. To do this, change the value of the definition USB_FORCED_FULLSPEED in the file libraries/nxpusblib/nxpUSBlibConfig.h to 1

Description This example implements a mass storage class device that operates on a FAT12 volume stored in internal RAM. The size of this volume is set by the constant DATA_RAM_PHYSICAL_SIZE defined in DataRam.h Compiler build configurations The software that makes up this example is designed to run on many different development boards. Therefore the compiler must be configured to build an image that is targeted to the development board you are using. This section explains how to set these build configurations for each of the supported compilers.   LPCXpresso IDE Configure projects   right click on the BSP project in the project explorer window   click Build Configurations->Set Active->(see configuration in table below)   repeat these steps with the CDL, nxpUSBlib, and Example_MassStorageDevice Configure MCU   right click on the Example_MassStorageDevice project in the project explorer window   click Properties->C/C++ Build->MCU settings->(see configuration in table below) Configure the indexer    click Window->Preferences->C/C++->Indexer->Use active build configuration BSP CDL nxpUSBlib Example_MassStorageDevice MCU LPC1850  / Hitex LPC18xx_HITEX LPC18xx LPC18xx_Device LPC18xx LPC1850 LPC4330  / Xplorer LPC4330_Xplorer LPC18xx LPC18xx_Device LPC18xx LPC4330 LPC4350  / Element14 LPC1435_ELEMENT14 LPC18xx LPC18xx_Device LPC18xx LPC4350 LPC11U14 / LPCXpresso LPC11Uxx_LPCXpressoRevB LPC11Uxx LPC11Uxx_Device LPC11Uxx LPC11U14 LPC11U14 / MCB1000 LPC11u14_MCB1000 LPC11Uxx LPC11Uxx_Device LPC11Uxx LPC11U14 LPC1768  / MCB1700 LPC1768_MCB1700 LPC17xx LPC17xx_Device LPC17xx LPC1768 LPC1768  / LPCXpresso LPC17xx_LPCXpressoRevB LPC17xx LPC17xx_Device LPC17xx LPC1768 NOTE: The LPC18xx CDL is used with boards that hold LPC43xx parts. This is done because the LPC43xx CDL is currently experimental. The LPC18xx USB library is used because both parts share the same controller.   Keil uVision 4 IDE Configure a Batch Build     click on Project->Batch Build...   expand the BSP project to display a list of project targets   select the project target by checking the appropriate checkbox (see target list in table below)   repeat these steps with the CDL, nxpUSBlib_Device, and Example_MassStorageDevice BSP CDL nxpUSBlib_Device Example_MassStorageDevice LPC1850  / Hitex HITEX1800 LPC18xx LPC18xx_Device HITEX1800 LPC1768  / MCB1700 MCB1700 LPC17xx LPC17xx_Device MCB1700 LPC11U14 / MCB1000 MCB1000 LPC11Uxx LPC11Uxx_Device MCB1000   Board connections and configurations   LPC18xx_HITEX (LPC1850 Hitex Evaluation Board)  older A2 design schematic ./BSP/schematics/HITEX_SCM_LPC1850EVA-A2-2.pdf   Connect the JTAG to the 20 pin receptacle marked X4 JTAG Connect the type-B end of a USB cable to the receptacle marked X2. Plug the type-A end of this cable into a PC LPC18xx_HITEX (LPC1850 Hitex Evaluation Board)  newer A4 design schematic ./BSP/schematics/HITEX_Final_LPC1850EVA-A3.pdf   LPC4330_Xplorer (NGX Xplorer Evaluation Board with LPC4330) Connect the JTAG to the 10 pin receptacle marked J2 Connect the micro-b end of a USB cable to the receptacle marked USB0. Plug the type-A end of this cable into a PC   LPC1435_ELEMENT14 (Element 14 gaming board with LPC4350) Connect the JTAG to the 10 pin receptacle marked J6 Connect one end of a type-A to type-A USB cable to the receptacle marked USB0. Plug the other end of this cable into a PC   LPC11u14_MCB1000 (Keil MCB1000 development board) schematic: ./BSP/schematics/mcb1000-schematics.pdf   Jumpers:   J4 = 2-3      (UCON - PIO0_6 pulls D+ high)   J2 = 1-2          (VDD  - core power)   J5 not installed  (ISP  - ISP via COMM)   J6 not installed  (RST  - ISP via COMM) Connect the JTAG debugger to the 10 pin Cortex Debug connector labeled J3 Connect the type-B end of a USB cable to the type-B recepticle and the type-A end of the cable to the USB receptacle on a PC Once the USB cable is connected to the board the following LEDs should be illuminated:     Power     All 8 LEDs in PIO2   LPC1768_MCB1700 (Keil MCB1700 development board) schematic: ./BSP/schematics/mcb1700-schematics.pdf   Jumpers:   E/U    = 1-2  (Ethernet/USB)   UMODE  = 1-2  (USB Device Mode)   D-     = Device   D+     = Device   VBUS   = 1-2   VDDIO  = 1-2   VDDREG = 1-2   Connect the JTAG debugger to the 20 pin JTAG or 10 pin Cortex Debug connector. Connect the type-B end of a USB cable to the type-B recepticle labeled 'Device' and the type-A end of the cable to the USB receptacle on a PC. Once the USB cable is connected to the board the following LEDs should be illuminated:     Power     100MHz     USC (LED indicates a USB soft connect from P2.9)    LPC11Uxx_LPCXpressoRevB (LPCXpresso LPC11Uxx on the LPCXpresso Rev B base board) schematic: ./BSP/schematics/lpcxpresso.lpc11u14.schematic.pdf   Running this example on the LPCXpresso LPC11U14 can be done one of two ways:   1. LPCXpresso LPC11U14 stand-alone       Connect the type-B end of a USB cable to the mini receptacle on the LPCXpresso board labeled J8 and the type-A end to the USB receptacle on a PC   2. LPCXpresso LPC11U14 plugged into the LPCXpresso base board Rev B       Plug the LPCXpresso LPC11U14 board into the connector labeled J4 on a LPCXpresso base board Rev B       Configure the base board according to the user's guide from Embedded Artists       Connect the mini type-B end of a USB cable to the receptacle on the base board labeled X1 and the type-A end to the USB receptacle on a PC       Once the USB cable is connected to the board the following LEDs should be illuminated:           LED25  (vbus)          LED26  (3.3v rail)         For both configurations the JTAG debugger is connected to the mini USB receptacle labeled J3 on the LPCXpresso LPC11U14 board   LPC17xx_LPCXpressoRevB (LPCXpresso LPC17xx on the LPCXpresso Rev B base board) schematic: ./BSP/schematics/LPCXpressoLPC1769revB.pdf   Running this example on the LPCXpresso LPC1769 can be done one of two ways:   1. LPCXpresso LPC1769 stand-alone. Solder a type-B USB receptacle onto the board and wire it up. See included schematics for details. Connect the type-B end of a USB cable to the receptacle on the LPCXpresso board and the type-A end to the USB receptacle on a PC   2. LPCXpresso LPC1769 plugged into the LPCXpresso base board Rev B. Plug the LPCXpresso LPC1769 board into the connector labeled J4 on a LPCXpresso base board Rev B. Configure the base board according to the users guide from Embedded Artists. Connect the mini type-B end of a USB cable to the receptacle on the base board labeled X1 and the type-A end to the USB receptacle on a PC.    Once the USB cable is connected to the board the following LEDs should be illuminated:       LED25  (vbus)       LED26  (3.3v rail)         For both configurations the JTAG debugger is connected to the mini USB receptacle labeled J3 on the LPCXpresso LPC1769 board. PC configuration Use a PC running Windows XP, Vista or 7 Connect the type-A end of the USB cable that is connected to the board into one of the USB receptacles on the PC Open a Windows File Explorer window Build and debug the example LPCXpresso IDE In the project explorer window of the IDE right click on the Example_MassStorageDevice project and select Debug As->C/C++ MCU Application In the main window of the IDE click Run->Resume to start running the application   Keil uVision 4 IDE In the Batch Build window, select the project targets as described in Compiler Build Configurations and then click Build In the main window of the IDE click Debug->Start/Stop Debug Session click Debug->Run   How this example runs and what to look for When the example is run and the board is connected to a PC with a USB cable it will enumerate on the PC as a mass storage device and show up in your Windows file explorer as a drive with the volume label "nxpUSBlib".   The drive will contain a single file called "README.TXT" which contains the text "This is a USB Memory Device demonstration. " Design notes This Mass Storage Device example defines a virtual drive size and a physical drive size. These numbers are defined in the file DataRam.h and look like this:   #define DATA_RAM_START_ADDRESS          0x20080000 #define DATA_RAM_PHYSICAL_SIZE            0xc00

Description This example implements a HID class device with mouse report descriptors. Key character reports are sent to the host by the device when buttons are pressed or the joystick is moved on the development board. Compiler build configurations The software that makes up this example is designed to run on many different development boards. Therefore the compiler must be configured to build an image that is targeted to the development board you are using. This section explains how to set these build configurations for each of the supported compilers.   LPCXpresso IDE Configure projects   right click on the BSP project in the project explorer window   click Build Configurations->Set Active->(see configuration in table below)   repeat these steps with the CDL, nxpUSBlib, and Example_KeyboardDevice Configure MCU   right click on the Example_KeyboardDevice project in the project explorer window   click Properties->C/C++ Build->MCU settings->(see configuration in table below) Configure the indexer    click Window->Preferences->C/C++->Indexer->Use active build configuration BSP CDL nxpUSBlib Example_KeyboardDevice MCU LPC1850  / Hitex LPC18xx_HITEX LPC18xx LPC18xx_Device LPC18xx LPC1850 LPC4330  / Xplorer LPC4330_Xplorer LPC18xx LPC18xx_Device LPC18xx LPC4330 LPC4350  / Element14 LPC1435_ELEMENT14 LPC18xx LPC18xx_Device LPC18xx LPC4350 LPC11U14 / LPCXpresso LPC11Uxx_LPCXpressoRevB LPC11Uxx LPC11Uxx_Device LPC11Uxx LPC11U14 LPC11U14 / MCB1000 LPC11u14_MCB1000 LPC11Uxx LPC11Uxx_Device LPC11Uxx LPC11U14 LPC1768  / MCB1700 LPC1768_MCB1700 LPC17xx LPC17xx_Device LPC17xx LPC1768 LPC1768  / LPCXpresso LPC17xx_LPCXpressoRevB LPC17xx LPC17xx_Device LPC17xx LPC1768 NOTE: The LPC18xx CDL is used with boards that hold LPC43xx parts. This is done because the LPC43xx CDL is currently experimental. The LPC18xx USB library is used because both parts share the same controller.   Keil uVision 4 IDE Configure a Batch Build     click on Project->Batch Build...   expand the BSP project to display a list of project targets   select the project target by checking the appropriate checkbox (see target list in table below)   repeat these steps with the CDL, nxpUSBlib_Device, and Example_KeyboardDevice BSP CDL nxpUSBlib_Device Example_KeyboardDevice LPC1850  / Hitex HITEX1800 LPC18xx LPC18xx_Device HITEX1800 LPC1768  / MCB1700 MCB1700 LPC17xx LPC17xx_Device MCB1700 LPC11U14 / MCB1000 MCB1000 LPC11Uxx LPC11Uxx_Device MCB1000   Board connections and configurations   LPC18xx_HITEX (LPC1850 Hitex Evaluation Board)  older A2 design schematic ./BSP/schematics/HITEX_SCM_LPC1850EVA-A2-2.pdf   Connect the JTAG to the 20 pin receptacle marked X4 JTAG Connect the type-B end of a USB cable to the receptacle marked X2. Plug the type-A end of this cable into a PC LPC18xx_HITEX (LPC1850 Hitex Evaluation Board)  newer A4 design schematic ./BSP/schematics/HITEX_Final_LPC1850EVA-A3.pdf   LPC4330_Xplorer (NGX Xplorer Evaluation Board with LPC4330) Connect the JTAG to the 10 pin receptacle marked J2 Connect the micro-b end of a USB cable to the receptacle marked USB0. Plug the type-A end of this cable into a PC   LPC1435_ELEMENT14 (Element 14 gaming board with LPC4350) Connect the JTAG to the 10 pin receptacle marked J6 Connect one end of a type-A to type-A USB cable to the receptacle marked USB0. Plug the other end of this cable into a PC   LPC11u14_MCB1000 (Keil MCB1000 development board) schematic: ./BSP/schematics/mcb1000-schematics.pdf   Jumpers:   J4 = 2-3      (UCON - PIO0_6 pulls D+ high)   J2 = 1-2          (VDD  - core power)   J5 not installed  (ISP  - ISP via COMM)   J6 not installed  (RST  - ISP via COMM) Connect the JTAG debugger to the 10 pin Cortex Debug connector labeled J3 Connect the type-B end of a USB cable to the type-B recepticle and the type-A end of the cable to the USB receptacle on a PC Once the USB cable is connected to the board the following LEDs should be illuminated:     Power     All 8 LEDs in PIO2   LPC1768_MCB1700 (Keil MCB1700 development board) schematic: ./BSP/schematics/mcb1700-schematics.pdf   Jumpers:   E/U    = 1-2  (Ethernet/USB)   UMODE  = 1-2  (USB Device Mode)   D-     = Device   D+     = Device   VBUS   = 1-2   VDDIO  = 1-2   VDDREG = 1-2   Connect the JTAG debugger to the 20 pin JTAG or 10 pin Cortex Debug connector. Connect the type-B end of a USB cable to the type-B recepticle labeled 'Device' and the type-A end of the cable to the USB receptacle on a PC. Once the USB cable is connected to the board the following LEDs should be illuminated:     Power     100MHz     USC (LED indicates a USB soft connect from P2.9)    LPC11Uxx_LPCXpressoRevB (LPCXpresso LPC11Uxx on the LPCXpresso Rev B base board) schematic: ./BSP/schematics/lpcxpresso.lpc11u14.schematic.pdf   Running this example on the LPCXpresso LPC11U14 can be done one of two ways:   1. LPCXpresso LPC11U14 stand-alone       Connect the type-B end of a USB cable to the mini receptacle on the LPCXpresso board labeled J8 and the type-A end to the USB receptacle on a PC   2. LPCXpresso LPC11U14 plugged into the LPCXpresso base board Rev B       Plug the LPCXpresso LPC11U14 board into the connector labeled J4 on a LPCXpresso base board Rev B       Configure the base board according to the user's guide from Embedded Artists       Connect the mini type-B end of a USB cable to the receptacle on the base board labeled X1 and the type-A end to the USB receptacle on a PC       Once the USB cable is connected to the board the following LEDs should be illuminated:           LED25  (vbus)          LED26  (3.3v rail)         For both configurations the JTAG debugger is connected to the mini USB receptacle labeled J3 on the LPCXpresso LPC11U14 board   LPC17xx_LPCXpressoRevB (LPCXpresso LPC17xx on the LPCXpresso Rev B base board) schematic: ./BSP/schematics/LPCXpressoLPC1769revB.pdf   Running this example on the LPCXpresso LPC1769 can be done one of two ways:   1. LPCXpresso LPC1769 stand-alone. Solder a type-B USB receptacle onto the board and wire it up. See included schematics for details. Connect the type-B end of a USB cable to the receptacle on the LPCXpresso board and the type-A end to the USB receptacle on a PC   2. LPCXpresso LPC1769 plugged into the LPCXpresso base board Rev B. Plug the LPCXpresso LPC1769 board into the connector labeled J4 on a LPCXpresso base board Rev B. Configure the base board according to the users guide from Embedded Artists. Connect the mini type-B end of a USB cable to the receptacle on the base board labeled X1 and the type-A end to the USB receptacle on a PC.    Once the USB cable is connected to the board the following LEDs should be illuminated:       LED25  (vbus)       LED26  (3.3v rail)         For both configurations the JTAG debugger is connected to the mini USB receptacle labeled J3 on the LPCXpresso LPC1769 board.   PC configuration Use a PC running Windows XP, Vista or 7 Connect the type-A end of the USB cable that is connected to the board into one of the USB receptacles on the PC Build and debug the example LPCXpresso IDE In the project explorer window of the IDE right click on the Example_KeyboardDevice project and select Debug As->C/C++ MCU Application In the main window of the IDE click Run->Resume to start running the application   Keil uVision 4 IDE In the Batch Build window, select the project targets as described in Compiler Build Configurations and then click Build In the main window of the IDE click Debug->Start/Stop Debug Session click Debug->Run   How this example runs and what to look for When the example is run and the board is connected to a PC with a USB cable it will enumerate on the PC as a HID Keyboard device. You should see the device appear in the "Device Manager" under "Keyboards". If you right click on HID Keyboard Device->Properties a window will appear called "HID Keyboard Device Properties". If you select the "Details" tab you will see a "Properties" drop down, click on it and select "Hardware Ids". You should see the below entries for Vendor Id and Product Id.   HID\VID_1FC9&PID_2042&REV_0001 HID\VID_1FC9&PID_2042   This information should match the data in the "Device Descriptor Structure" in the "Descriptors.c" file in the Example_KeyboardDevice project directory.   To demostrate the keyboard open an editing application such as Notepad or MS Word. Moving the joystick (SW2) on the Xpresso base board will output characters onto the editing application.

Description This example implements a HID class device with mouse report descriptors. Mouse movement reports are sent to the host by the device when buttons or the joystick is pressed on the development board.   On the Embedded Artists LPCXpresso Rev A or B Baseboard this example will move the host PC's mouse cursor when the joystick is operated. Pressing the joystick down will create a mouse left click. Compiler build configurations The software that makes up this example is designed to run on many different development boards. Therefore the compiler must be configured to build an image that is targeted to the development board you are using. This section explains how to set these build configurations for each of the supported compilers.   LPCXpresso IDE Configure projects   right click on the BSP project in the project explorer window   click Build Configurations->Set Active->(see configuration in table below)   repeat these steps with the CDL, nxpUSBlib, and Example_MouseDevice Configure MCU   right click on the Example_MouseDevice project in the project explorer window   click Properties->C/C++ Build->MCU settings->(see configuration in table below) Configure the indexer    click Window->Preferences->C/C++->Indexer->Use active build configuration BSP CDL nxpUSBlib Example_MouseDevice MCU LPC1850  / Hitex LPC18xx_HITEX LPC18xx LPC18xx_Device LPC18xx LPC1850 LPC4330  / Xplorer LPC4330_Xplorer LPC18xx LPC18xx_Device LPC18xx LPC4330 LPC4350  / Element14 LPC1435_ELEMENT14 LPC18xx LPC18xx_Device LPC18xx LPC4350 LPC11U14 / LPCXpresso LPC11Uxx_LPCXpressoRevB LPC11Uxx LPC11Uxx_Device LPC11Uxx LPC11U14 LPC11U14 / MCB1000 LPC11u14_MCB1000 LPC11Uxx LPC11Uxx_Device LPC11Uxx LPC11U14 LPC1768  / MCB1700 LPC1768_MCB1700 LPC17xx LPC17xx_Device LPC17xx LPC1768 LPC1768  / LPCXpresso LPC17xx_LPCXpressoRevB LPC17xx LPC17xx_Device LPC17xx LPC1768 NOTE: The LPC18xx CDL is used with boards that hold LPC43xx parts. This is done because the LPC43xx CDL is currently experimental. The LPC18xx USB library is used because both parts share the same controller.   Keil uVision 4 IDE Configure a Batch Build     click on Project->Batch Build...   expand the BSP project to display a list of project targets   select the project target by checking the appropriate checkbox (see target list in table below)   repeat these steps with the CDL, nxpUSBlib_Device, and Example_MouseDevice BSP CDL nxpUSBlib_Device Example_MouseDevice LPC1850  / Hitex HITEX1800 LPC18xx LPC18xx_Device HITEX1800 LPC1768  / MCB1700 MCB1700 LPC17xx LPC17xx_Device MCB1700 LPC11U14 / MCB1000 MCB1000 LPC11Uxx LPC11Uxx_Device MCB1000   Board connections and configurations   LPC18xx_HITEX (LPC1850 Hitex Evaluation Board)  older A2 design schematic ./BSP/schematics/HITEX_SCM_LPC1850EVA-A2-2.pdf   Connect the JTAG to the 20 pin receptacle marked X4 JTAG Connect the type-B end of a USB cable to the receptacle marked X2. Plug the type-A end of this cable into a PC LPC18xx_HITEX (LPC1850 Hitex Evaluation Board)  newer A4 design schematic ./BSP/schematics/HITEX_Final_LPC1850EVA-A3.pdf   LPC4330_Xplorer (NGX Xplorer Evaluation Board with LPC4330) Connect the JTAG to the 10 pin receptacle marked J2 Connect the micro-b end of a USB cable to the receptacle marked USB0. Plug the type-A end of this cable into a PC   LPC1435_ELEMENT14 (Element 14 gaming board with LPC4350) Connect the JTAG to the 10 pin receptacle marked J6 Connect one end of a type-A to type-A USB cable to the receptacle marked USB0. Plug the other end of this cable into a PC   LPC11u14_MCB1000 (Keil MCB1000 development board) schematic: ./BSP/schematics/mcb1000-schematics.pdf   Jumpers:   J4 = 2-3      (UCON - PIO0_6 pulls D+ high)   J2 = 1-2          (VDD  - core power)   J5 not installed  (ISP  - ISP via COMM)   J6 not installed  (RST  - ISP via COMM) Connect the JTAG debugger to the 10 pin Cortex Debug connector labeled J3 Connect the type-B end of a USB cable to the type-B recepticle and the type-A end of the cable to the USB receptacle on a PC Once the USB cable is connected to the board the following LEDs should be illuminated:     Power     All 8 LEDs in PIO2   LPC1768_MCB1700 (Keil MCB1700 development board) schematic: ./BSP/schematics/mcb1700-schematics.pdf   Jumpers:   E/U    = 1-2  (Ethernet/USB)   UMODE  = 1-2  (USB Device Mode)   D-     = Device   D+     = Device   VBUS   = 1-2   VDDIO  = 1-2   VDDREG = 1-2   Connect the JTAG debugger to the 20 pin JTAG or 10 pin Cortex Debug connector. Connect the type-B end of a USB cable to the type-B recepticle labeled 'Device' and the type-A end of the cable to the USB receptacle on a PC. Once the USB cable is connected to the board the following LEDs should be illuminated:     Power     100MHz     USC (LED indicates a USB soft connect from P2.9)    LPC11Uxx_LPCXpressoRevB (LPCXpresso LPC11Uxx on the LPCXpresso Rev B base board) schematic: ./BSP/schematics/lpcxpresso.lpc11u14.schematic.pdf   Running this example on the LPCXpresso LPC11U14 can be done one of two ways:   1. LPCXpresso LPC11U14 stand-alone       Connect the type-B end of a USB cable to the mini receptacle on the LPCXpresso board labeled J8 and the type-A end to the USB receptacle on a PC   2. LPCXpresso LPC11U14 plugged into the LPCXpresso base board Rev B       Plug the LPCXpresso LPC11U14 board into the connector labeled J4 on a LPCXpresso base board Rev B       Configure the base board according to the user's guide from Embedded Artists       Connect the mini type-B end of a USB cable to the receptacle on the base board labeled X1 and the type-A end to the USB receptacle on a PC       Once the USB cable is connected to the board the following LEDs should be illuminated:           LED25  (vbus)          LED26  (3.3v rail)         For both configurations the JTAG debugger is connected to the mini USB receptacle labeled J3 on the LPCXpresso LPC11U14 board   LPC17xx_LPCXpressoRevB (LPCXpresso LPC17xx on the LPCXpresso Rev B base board) schematic: ./BSP/schematics/LPCXpressoLPC1769revB.pdf   Running this example on the LPCXpresso LPC1769 can be done one of two ways:   1. LPCXpresso LPC1769 stand-alone. Solder a type-B USB receptacle onto the board and wire it up. See included schematics for details. Connect the type-B end of a USB cable to the receptacle on the LPCXpresso board and the type-A end to the USB receptacle on a PC   2. LPCXpresso LPC1769 plugged into the LPCXpresso base board Rev B. Plug the LPCXpresso LPC1769 board into the connector labeled J4 on a LPCXpresso base board Rev B. Configure the base board according to the users guide from Embedded Artists. Connect the mini type-B end of a USB cable to the receptacle on the base board labeled X1 and the type-A end to the USB receptacle on a PC.    Once the USB cable is connected to the board the following LEDs should be illuminated:       LED25  (vbus)       LED26  (3.3v rail)         For both configurations the JTAG debugger is connected to the mini USB receptacle labeled J3 on the LPCXpresso LPC1769 board.   PC configuration Use a PC running Windows XP, Vista or 7 Connect the type-A end of the USB cable that is connected to the board into one of the USB receptacles on the PC Build and debug the example LPCXpresso IDE In the project explorer window of the IDE right click on the Example_MouseDevice project and select Debug As->C/C++ MCU Application In the main window of the IDE click Run->Resume to start running the application   Keil uVision 4 IDE In the Batch Build window, select the project targets as described in Compiler Build Configurations and then click Build In the main window of the IDE click Debug->Start/Stop Debug Session click Debug->Run   How this example runs and what to look for When the example is run and the board is connected to a PC with a USB cable it will enumerate on the PC as a HID Mouse device. You should see the device appear in the "Device Manager" under "Mice". If you right click on HID  Device->Properties a window will appear called "HID Mouse Device Properties". If you select the "Details" tab you will see a "Properties" drop down, click on it and select "Hardware Ids". You should see the below entries for Vendor Id and Product Id.   HID\VID_1FC9&PID_2041&REV_0001 HID\VID_1FC9&PID_2041   This information should match the data in the "Device Descriptor Structure" in the "Descriptors.c" file in the Example_MouseDevice project directory.   Press the joystick to move the mouse cursor on the PC desktop and push the buttons to cause mouse buttons to click.

Description This example implements a mass storage class host mode device that enumerates a mass storage class device (USB flash drive). It reads the first sector of the device and displays a hexdump style listing of that data on a terminal.   Compiler build configurations The software that makes up this example is designed to run on many different development boards. Therefore the compiler must be configured to build an image that is targeted to the development board you are using. This section explains how to set these build configurations for each of the supported compilers.   LPCXpresso IDE Configure projects   right click on the BSP project in the project explorer window   click Build Configurations->Set Active->(see configuration in table below)   repeat these steps with the CDL, nxpUSBlib, and Example_MassStorageHost Configure MCU   right click on the Example_MassStorageHost project in the project explorer window   click Properties->C/C++ Build->MCU settings->(see configuration in table below) Configure the indexer    click Window->Preferences->C/C++->Indexer->Use active build configuration   BSP CDL nxpUSBlib Example_MassStorageDevice MCU LPC1850  / Hitex LPC18xx_HITEX LPC18xx LPC18xx_Host LPC18xx LPC1850 LPC4330  / Xplorer LPC4330_Xplorer LPC18xx LPC18xx_Host LPC18xx LPC4330 LPC4350  / Element14 LPC1435_ELEMENT14 LPC18xx LPC18xx_Host LPC18xx LPC4350 LPC1768  / MCB1700 LPC1768_MCB1700 LPC17xx LPC17xx_Host LPC17xx LPC1768 LPC1768  / LPCXpresso LPC17xx_LPCXpressoRevB LPC17xx LPC17xx_Host LPC17xx LPC1768 NOTE: The LPC18xx CDL is used with boards that hold LPC43xx parts. This is done because the LPC43xx CDL is currently experimental. The LPC18xx USB library is used because both parts share the same controller. Keil uVision 4 IDE Configure a Batch Build     click on Project->Batch Build...   expand the BSP project to display a list of project targets   select the project target by checking the appropriate checkbox (see target list in table below)   repeat these steps with the CDL, nxpUSBlib_Host, and Example_MassStorageDevice BSP CDL nxpUSBlib_Host Example_MassStorageDevice LPC1850  / Hitex HITEX1800 LPC18xx LPC18xx_Host HITEX1800 LPC1768  / MCB1700 MCB1700 LPC17xx LPC17xx_Host MCB1700   Board connections and configurations LPC18xx_HITEX (LPC1850 Hitex Evaluation Board)  older A2 design schematic ./BSP/schematics/HITEX_SCM_LPC1850EVA-A2-2.pdf Connect the JTAG to the 20 pin receptacle marked X4 JTAG Connect a USB flash drive into the type A receptacle marked X10 Connect a 9-pin serial cable into the receptacle marked UART X1. Connect the other end of this cable into a PC running a terminal program. To power the board:   Connect the type-B end of a powered USB cable into the receptacle marked X13   or   Supply 5v to the DC connector labeled X14   LPC18xx_HITEX (LPC1850 Hitex Evaluation Board)  newer A3 design schematic ./BSP/schematics/HITEX_Final_LPC1850EVA-A3.pdf   LPC1768_MCB1700 (Keil MCB1700 development board) schematic: ./BSP/schematics/mcb1700-schematics.pdf Jumper Setting   E/U 1-2 UMODE 1-2 D- Host D+ Host VBUS 1-2 VDDIO 1-2 VDDREG 1-2 ISP removed Connect the JTAG debugger to the 20 pin JTAG or 10 pin Cortex Debug connector Connect a 9 pin serial cable between COM0 on the board and a PC running a terminal program. Baud rate = 9600 Plug a USB flash drive into the type A receptacle marked HOST To power the board:   Connect the type-B end of a powered USB cable to the type-B receptacle labeled 'Device'   or   Supply 5v to the -VIN+ pins between the JTAG and COM0 receptacles Once the board is powered the following LEDs should be illuminated:     Power     100MHz     USC   LPC17xx_LPCXpressoRevB (LPCXpresso LPC17xx on the LPCXpresso Rev B base board) schematic: ./BSP/schematics/LPCXpressoLPC1769revB.pdf   Plug the LPCXpresso LPC1769 board into the connector labeled J4 on a   LPCXpresso base board Connect the JTAG to the mini USB receptacle labeled J3 on the LPCXpresso LPC1769   board Configure the base board according to the users guide from Embedded Artists Install jumpers 1-2, 3-4, 5-6 on the jumper block marked J61 on the base board Plug a USB flash drive into the type A receptacle marked J60 on the base board Connect the mini type-B end of a USB cable to the USB-to-serial receptacle on   the base board labeled X3 and the type-A end to the USB receptacle on a PC. Once the USB cable is connected to the board the following LEDs should be   illuminated:     LED25  (vbus)     LED26  (3.3v rail)          PC configuration Use a PC running Windows XP, Vista or 7 to display runtime diagnostics that can be viewed with a terminal emulation program like Teraterm or Hyperterm. The baud rate in these programs should be set to 9600.   Build and debug the example LPCXpresso IDE In the project explorer window of the IDE right click on the Example_MassStorageHost project and select Debug As->C/C++ MCU Application In the main window of the IDE click Run->Resume to start running the application   Keil uVision 4 IDE In the Batch Build window, select the project targets as described in Compiler Build Configurations and then click Build In the main window of the IDE click Debug->Start/Stop Debug Session click Debug->Run   How this example runs and what to look for When the example is first run the terminal window will display: Mass Storage Host Demo running.   When a flash drive is plugged in the terminal window will display   something similar to this:   Device Attached.   Total LUNs: 1 - Using first LUN in device. Vendor "USB     ", Product "Flash Disk      " Mass Storage Device Enumerated.   Waiting until ready...   Retrieving Capacity...   1957887 blocks of 512 bytes.   Contents of first block:   33 C0 8E D0 BC 00 7C FB 50 07 50 1F FC BE 1B 7C     3.....|.P.P....| BF 1B 06 50 57 B9 E5 01 F3 A4 CB BD BE 07 B1 04     ...PW........... 38 6E 00 7C 09 75 13 83 C5 10 E2 F4 CD 18 8B F5     8n.|.u.......... 83 C6 10 49 74 19 38 2C 74 F6 A0 B5 07 B4 07 8B     ...It.8,t....... F0 AC 3C 00 74 FC BB 07 00 B4 0E CD 10 EB F2 88     ..<.t........... 4E 10 E8 46 00 73 2A FE 46 10 80 7E 04 0B 74 0B     N..F.s*.F..~..t. 80 7E 04 0C 74 05 A0 B6 07 75 D2 80 46 02 06 83     .~..t....u..F... 46 08 06 83 56 0A 00 E8 21 00 73 05 A0 B6 07 EB     F...V...!.s..... BC 81 3E FE 7D 55 AA 74 0B 80 7E 10 00 74 C8 A0     ..>.}U.t..~..t.. B7 07 EB A9 8B FC 1E 57 8B F5 CB BF 05 00 8A 56     .......W.......V 00 B4 08 CD 13 72 23 8A C1 24 3F 98 8A DE 8A FC     .....r#..$?..... 43 F7 E3 8B D1 86 D6 B1 06 D2 EE 42 F7 E2 39 56     C..........B..9V 0A 77 23 72 05 39 46 08 73 1C B8 01 02 BB 00 7C     .w#r.9F.s......| 8B 4E 02 8B 56 00 CD 13 73 51 4F 74 4E 32 E4 8A     .N..V...sQOtN2.. 56 00 CD 13 EB E4 8A 56 00 60 BB AA 55 B4 41 CD     V......V.`..U.A. 13 72 36 81 FB 55 AA 75 30 F6 C1 01 74 2B 61 60     .r6..U.u0...t+a` 6A 00 6A 00 FF 76 0A FF 76 08 6A 00 68 00 7C 6A     j.j..v..v.j.h.|j 01 6A 10 B4 42 8B F4 CD 13 61 61 73 0E 4F 74 0B     .j..B....aas.Ot. 32 E4 8A 56 00 CD 13 EB D6 61 F9 C3 49 6E 76 61     2..V.....a..Inva 6C 69 64 20 70 61 72 74 69 74 69 6F 6E 20 74 61     lid partition ta 62 6C 65 00 45 72 72 6F 72 20 6C 6F 61 64 69 6E     ble.Error loadin 67 20 6F 70 65 72 61 74 69 6E 67 20 73 79 73 74     g operating syst 65 6D 00 4D 69 73 73 69 6E 67 20 6F 70 65 72 61     em.Missing opera 74 69 6E 67 20 73 79 73 74 65 6D 00 00 00 00 00     ting system..... 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00     ................ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00     ................ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00     ................ 00 00 00 00 00 2C 44 63 18 2E 07 C3 00 00 80 01     .....,Dc........ 01 00 06 20 00 77 00 02 00 00 00 DE 1D 00 00 00     ... .w.......... 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00     ................ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00     ................ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 55 AA     ..............U.   When the flash drive is unplugged the ternimal window will display: Device Unattached.

Description This example implements a HID class host mode device that enumerates a HID class device with keyboard report descriptors and displays key press characters on a terminal. NOTE: many keyboards enumerate as a HUB device which is not supported by this example. Compiler build configurations The software that makes up this example is designed to run on many different development boards. Therefore the compiler must be configured to build an image that is targeted to the development board you are using. This section explains how to set these build configurations for each of the supported compilers.   LPCXpresso IDE Configure projects   right click on the BSP project in the project explorer window   click Build Configurations->Set Active->(see configuration in table below)   repeat these steps with the CDL, nxpUSBlib, and Example_KeyboardHost Configure MCU   right click on the Example_KeyboardHost project in the project explorer window   click Properties->C/C++ Build->MCU settings->(see configuration in table below) Configure the indexer    click Window->Preferences->C/C++->Indexer->Use active build configuration   BSP CDL nxpUSBlib Example_KeyboardDevice MCU LPC1850  / Hitex LPC18xx_HITEX LPC18xx LPC18xx_Host LPC18xx LPC1850 LPC4330  / Xplorer LPC4330_Xplorer LPC18xx LPC18xx_Host LPC18xx LPC4330 LPC4350  / Element14 LPC1435_ELEMENT14 LPC18xx LPC18xx_Host LPC18xx LPC4350 LPC1768  / MCB1700 LPC1768_MCB1700 LPC17xx LPC17xx_Host LPC17xx LPC1768 LPC1768  / LPCXpresso LPC17xx_LPCXpressoRevB LPC17xx LPC17xx_Host LPC17xx LPC1768 NOTE: The LPC18xx CDL is used with boards that hold LPC43xx parts. This is done because the LPC43xx CDL is currently experimental. The LPC18xx USB library is used because both parts share the same controller. Keil uVision 4 IDE Configure a Batch Build     click on Project->Batch Build...   expand the BSP project to display a list of project targets   select the project target by checking the appropriate checkbox (see target list in table below)   repeat these steps with the CDL, nxpUSBlib_Host, and Example_KeyboardDevice BSP CDL nxpUSBlib_Host Example_KeyboardDevice LPC1850  / Hitex HITEX1800 LPC18xx LPC18xx_Host HITEX1800 LPC1768  / MCB1700 MCB1700 LPC17xx LPC17xx_Host MCB1700   Board connections and configurations LPC18xx_HITEX (LPC1850 Hitex Evaluation Board)  older A2 design schematic ./BSP/schematics/HITEX_SCM_LPC1850EVA-A2-2.pdf Connect the JTAG to the 20 pin receptacle marked X4 JTAG Connect a keyboard into the type A receptacle marked X10 Connect a 9-pin serial cable into the receptacle marked UART X1. Connect the other end of this cable into a PC running a terminal program. To power the board:   Connect the type-B end of a powered USB cable into the receptacle marked X13   or   Supply 5v to the DC connector labeled X14   LPC18xx_HITEX (LPC1850 Hitex Evaluation Board)  newer A3 design schematic ./BSP/schematics/HITEX_Final_LPC1850EVA-A3.pdf   LPC1768_MCB1700 (Keil MCB1700 development board) schematic: ./BSP/schematics/mcb1700-schematics.pdf Jumper Setting   E/U 1-2 UMODE 1-2 D- Host D+ Host VBUS 1-2 VDDIO 1-2 VDDREG 1-2 ISP removed Connect the JTAG debugger to the 20 pin JTAG or 10 pin Cortex Debug connector Connect a 9 pin serial cable between COM0 on the board and a PC running a terminal program. Baud rate = 9600 Plug a keyboard into the type A receptacle marked HOST To power the board:   Connect the type-B end of a powered USB cable to the type-B receptacle labeled 'Device'   or   Supply 5v to the -VIN+ pins between the JTAG and COM0 receptacles Once the board is powered the following LEDs should be illuminated:     Power     100MHz     USC   LPC17xx_LPCXpressoRevB (LPCXpresso LPC17xx on the LPCXpresso Rev B base board) schematic: ./BSP/schematics/LPCXpressoLPC1769revB.pdf   Plug the LPCXpresso LPC1769 board into the connector labeled J4 on a   LPCXpresso base board Connect the JTAG to the mini USB receptacle labeled J3 on the LPCXpresso LPC1769   board Configure the base board according to the users guide from Embedded Artists Install jumpers 1-2, 3-4, 5-6 on the jumper block marked J61 on the base board Plug a keyboard into the type A receptacle marked J60 on the base board Connect the mini type-B end of a USB cable to the USB-to-serial receptacle on   the base board labeled X3 and the type-A end to the USB receptacle on a PC. Once the USB cable is connected to the board the following LEDs should be   illuminated:     LED25  (vbus)     LED26  (3.3v rail)          PC configuration Use a PC running Windows XP, Vista or 7 to display runtime diagnostics that can be viewed with a terminal emulation program like Teraterm or Hyperterm. The baud rate in these programs should be set to 9600.   Build and debug the example LPCXpresso IDE In the project explorer window of the IDE right click on the Example_KeyboardHost project and select Debug As->C/C++ MCU Application In the main window of the IDE click Run->Resume to start running the application   Keil uVision 4 IDE In the Batch Build window, select the project targets as described in Compiler Build Configurations and then click Build In the main window of the IDE click Debug->Start/Stop Debug Session click Debug->Run   How this example runs and what to look for When the example is first run the terminal window will display: Keyboard Host Demo running.   When the keyboard is plugged in the terminal window will display: Device Attached. Keyboard Enumerated.   When a key is pressed on the keyboard an upper case character corresponding to that key will be displayed in the terminal window.   When the keyboard is unplugged the ternimal window will display: Device Unattached.