Content originally posted in LPCWare by Ex-Zero on Tue Jan 03 07:25:39 MST 2012
Quote:
...give the solution...
The solution is given above :mad:
Check P2.10 with a scope and check your code (is it 'valid' ?) :eek:
User manual:
Quote:
32.3 Description
The flash boot loader code is executed every time the part is powered on or reset. The
loader can execute the [COLOR=Red]ISP[/COLOR] command handler or the user application code. A LOW level
after reset at pin P2.10 is considered an external hardware request to start the ISP
command handler. Assuming that power supply pins are on their nominal levels when the
rising edge on RESET pin is generated, it may take up to 3 ms before P2.10 is sampled
and the decision on whether to continue with user code or ISP handler is made. If P2.10 is
sampled low and the watchdog overflow flag is set, the external hardware request to start
the ISP command handler is ignored. If there is no request for the ISP command handler
execution (P2.10 is sampled HIGH after reset), a search is made for a valid user program.
If a valid user program is found then the execution control is transferred to it. If a valid user
program is not found, the auto-baud routine is invoked.
Pin P2.10 is used as a hardware request signal for ISP and therefore requires special
attention. Since P2.10 is in high impedance mode after reset, it is important that the user
provides external hardware (a pull-up resistor or other device) to put the pin in a defined
state. Otherwise unintended entry into ISP mode may occur.
Quote:
32.3.1.1 Criterion for [COLOR=Red]Valid User Code[/COLOR]
The reserved Cortex-M3 exception vector location 7 (offset 0x 001C in the vector table)
should contain the 2’s complement of the check-sum of table entries 0 through 6. This
causes the checksum of the first 8 table entries to be 0. The boot loader code checksums
the first 8 locations in sector 0 of the flash. If the result is 0, then execution control is
transferred to the user code.
