Debugger not recognizing registers NVIC IRQ_PRIORITY 4-31 ?

[lpcware]

Content originally posted in LPCWare by smichaud on Sat Jan 01 14:48:38 MST 2011
Hi,

It looks like the debugger (lpcxpresso v3.6) does not recognize the NVIC peripheral, Interrupt Priority, for vectors 4-31

IRQ_3_0_PRIORITY shows up correctly at address 0xe000e400, I don't see any information for the remaining registers :
IRQ_7_4_PRIORITY (should be at address 0xe000e404,
IRQ_11_3_PRIORITY (should be at address 0xe000e408,
IRQ_15_7_PRIORITY (should be at address 0xe000e40c,
IRQ_19_11_PRIORITY (should be at address 0xe000e410,
IRQ_23_15_PRIORITY (should be at address 0xe000e414,
IRQ_27_19_PRIORITY (should be at address 0xe000e418, or
IRQ_31_24_PRIORITY (should be at address 0xe000e41c

I am using an LPC1113/301 processor.

Is there something I should be setting in the toolset?  Is this a known problem (is there a workaround?)

Thanks,   Sean

[lpcware]

Content originally posted in LPCWare by smichaud on Mon Jan 10 14:55:35 MST 2011
Thanks again -

Just got a chance to download the latest (3.6.1), and now am seeing both SPI1 and all IRQ priority registers, for the LPC1113

Appreciate the quick support,

Sean

[lpcware]

Content originally posted in LPCWare by CodeRedSupport on Tue Jan 04 03:40:22 MST 2011
Just to confirm, we will update the peripheral view for the LPC11 NVIC and other registers within the Cortex-M0 System Control Space (SCS) in the next release of the tools.

Regards,
CodeRedSupport.

[lpcware]

Content originally posted in LPCWare by CodeRedSupport on Mon Jan 03 17:00:08 MST 2011
I see the confusion. For some reason I thought you were using an LPC1343, but I see you're using the LPC1113/301 specified in your original post. The NVIC registers for the CM0 are different than the CM3 part. Please refer to the Cortex™-M0 Technical Reference Manual, Chapter 5, Nested Vectored Interrupt Controller.

Regards,
CodeRedSupport

Edit: The XME is under review, and we'll let you know if an update is available.

[lpcware]

Content originally posted in LPCWare by CodeRedSupport on Mon Jan 03 09:43:29 MST 2011
I see all priority registers in the Develop Perspective using the distributed LPC1343 example program. We are both using LPCXpresso v3.6.0 (build 253). The peripheral definitions for the NVIC are actually in a separate XME file. Can you display addresses 0xE000E400-0xE00041C in the memory display? Until I can find out why you don't see what I see, the memory view may have to substitute.

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Quote: smichaud
Thanks for the follow-up --

Yes, I am running LPCXpresso 3.6.0 (build 253), still seeing this issue.

Just to be clear, I do see IRQ_3_0_PRIORITY, under NVIC peripheral

What I don't see is the rest of the IRQ PRIORITY registers (4-31)

Do you see all IRQ PRIORITY registers, through 31, using v3.6.0 ?
Is there any way a file in my project could be causing this?

One other piece of info: I had posted an issue re: v3.6.0 not displaying SPI1 registers, and was sent a 'patch' version of nxp_lpc11xx.xme which corrected this.  I just tried going back to the original version of nxp_lpc11xx.xme, thinking that may have caused the IRQ PRIORITY register problem but didn't see any difference there ...

Thanks for your help,   Sean

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[lpcware]

Content originally posted in LPCWare by smichaud on Mon Jan 03 00:17:17 MST 2011
Thanks for the follow-up --

Yes, I am running LPCXpresso 3.6.0 (build 253), still seeing this issue.

Just to be clear, I do see IRQ_3_0_PRIORITY, under NVIC peripheral

What I don't see is the rest of the IRQ PRIORITY registers (4-31)

Do you see all IRQ PRIORITY registers, through 31, using v3.6.0 ?
Is there any way a file in my project could be causing this?

One other piece of info: I had posted an issue re: v3.6.0 not displaying SPI1 registers, and was sent a 'patch' version of nxp_lpc11xx.xme which corrected this.  I just tried going back to the original version of nxp_lpc11xx.xme, thinking that may have caused the IRQ PRIORITY register problem but didn't see any difference there ...

Thanks for your help,   Sean

[lpcware]

Content originally posted in LPCWare by CodeRedSupport on Sun Jan 02 11:57:50 MST 2011
The LPCXpresso v3.6.0 release shows the NVIC priority registers correctly (NVIC peripheral). If you are not yet using v3.6, here's a download link which requires your login:

http://lpcxpresso.code-red-tech.com/LPCXpresso

Regards,
CodeRedSupport

[lpcware]

Content originally posted in LPCWare by CodeRedSupport on Sun Jan 02 01:46:14 MST 2011
Part of the confusion for us is the register names in your original post didn't all match up. We'll investigate and let you know what we find.

Regards,

CodeRedSupport

[lpcware]

Content originally posted in LPCWare by smichaud on Sat Jan 01 22:08:47 MST 2011
Yes, that's correct -

If I wasn't clear, that is what I was expecting to see in the debugger window.

Instead, I only see the first entry (IRQ_3_0_PRIORITY)

The remaining registers (as listed below) *are missing* from the debugger window

Thanks again,

Sean

[lpcware]

Content originally posted in LPCWare by CodeRedSupport on Sat Jan 01 16:05:21 MST 2011
You didn't mention the document source where you're getting your information. Please refer to the ARM Cortex™-M3 Technical Reference Manual. The priority registers map is as follows:

E000E400: IRQ_3_0_PRIORITY
E000E404: IRQ_7_4_PRIORITY
E000E408: IRQ_11_8_PRIORITY
E000E40C: IRQ_15_12_PRIORITY
E000E410: IRQ_19_16_PRIORITY
E000E414: IRQ_23_20_PRIORITY
E000E418: IRQ_27_24_PRIORITY
E000E41C: IRQ_31_28_PRIORITY

Regards,

CodeRedSupport

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Quote: smichaud
Hi,

It looks like the debugger (lpcxpresso v3.6) does not recognize the NVIC peripheral, Interrupt Priority, for vectors 4-31

IRQ_3_0_PRIORITY shows up correctly at address 0xe000e400, I don't see any information for the remaining registers :
IRQ_7_4_PRIORITY (should be at address 0xe000e404,
IRQ_11_3_PRIORITY (should be at address 0xe000e408,
IRQ_15_7_PRIORITY (should be at address 0xe000e40c,
IRQ_19_11_PRIORITY (should be at address 0xe000e410,
IRQ_23_15_PRIORITY (should be at address 0xe000e414,
IRQ_27_19_PRIORITY (should be at address 0xe000e418, or
IRQ_31_24_PRIORITY (should be at address 0xe000e41c

I am using an LPC1113/301 processor.

Is there something I should be setting in the toolset?  Is this a known problem (is there a workaround?)

Thanks,   Sean

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