Placing data into different RAM blocks

[lpcware-support]

Many MCUs provide more than one bank of RAM. By default the managed linker script mechanism will place all of the application data and bss (as well as the heap and stack) into the first bank of RAM.

However it is also possible to place specific data or bss items into any of the defined banks for the target MCU, as displayed in:

Project Properties ->  C/C++ Build -> MCU settings

This placement is controlled via macros provided in an LPCXpresso header file which can be pulled into your project using:

#include <cr_section_macros.h> 

For simplicity, the *additional* memory regions are named sequentially, starting from 2, so RAM2, RAM3 etc (as well as using their "formal" region name - for example RamAHB32).

For example, the LPC1768 has a second bank of RAM at address 0x2007c000. The linker creates a new data (and

equivalent bss) load section:

.data_RAM2 : ALIGN(4) 
{ 
    FILL(0xff)
    *(.data.$RAM2*)
    *(.data.$RamAHB32*) 
} > RamAHB32 AT>MFlash512

To place data into this section, you can use the __DATA macro, thus:

__DATA(RAM2) char data_buffer[1024] ; // create an initialised 1k buffer in RAM2

Or the __BSS macro:

__BSS(RAM2) char bss_buffer[128] ; // create a zero-init buffer in RAM2

Of course, if you do not place any data into these additional areas, then the linker does not create anything in those areas.

In order to initialize additional RAM banks, the managed linker script mechanism will create a "Global Section Table" in your image, directly after the vector table. This contains the addresses and lengths of each of the data and bss sections, so that the startup code can then initialize them.

The LPCXpresso generated startup code will then initialization of multiple regions by entering a loop reading this global section table, and calling a subroutine to carry out the initialization of each region it finds in the Global Section Table.

Related FAQ

• Placing code/rodata into different FLASH blocks
• Placing data at an address
• Reserving RAM for ROM drivers