triggering DMA with SCT for LPC54102

[skanda19]

Hello, 

I am still trying to trigger DMA transfers with the SCT block, I have configured the DMAREQ0 to trigger with EVEN[1] that is match event, this is on the SCT side. 

On the DMA/INPUT MUX side I have enable trigger request #2: SCT0 DMA REQUEST 0,  matching what I have described in the paragraph before and used the DMA_ITRIG_INMUX21 that is not tied to any of the UART, SPI or I2C. 

I can see on debug mode that the bits needed are set and the trigger for sct is there but there's no transfer, can someone please help me figure it out what's the issue ??

[Alice_Yang]

Hello @skanda19 

1) Have a look at the below thread:

https://community.nxp.com/t5/LPC-Microcontrollers/LPC82x-SCT-DMAREQ-example/m-p/1306321  

Refer to SCT and DMA demo under SDK .

2) You can try to use MCUXpresso configuration tool to config SCTIMER trigger DMA:

BR

Alice

[skanda19]

Hello @Alice_Yang, 

At the moment I been to trigger the DMA with the SCT trigger, but can't send that the whole buffer out to the MATCHREG in the SCT block. 

once the first trigger is set and then I send out the first value I get a conflict flag on the SCT. 

I am not 100% sure if the handling of my configuration is correct neither my handling of the DMA ISR. 

would you be able to suggest me any changes ???? thanks. 

NOTE: I been developing this on Keil uvision

thanks

[Alice_Yang]

Hello @skanda19 

Recommend you first DMA part can work well, and debug to view related registers to check the issue.

Use keil, there is MCUXpresso Config TOOL, can config SCT as I mentioned before, download from:

https://www.nxp.com/design/software/development-software/mcuxpresso-software-and-tools-/mcuxpresso-c...  

BR

Alice

[skanda19]

Hello @Alice_Yang,

unfortunately, I can't use the resources you provided because this is part of a larger project that uses the libraries 2.6.x

I been checking the registers to as you suggested and what happens is that once I transfer the first data, the interruption error on the DMA side gets triggered and apparently even though I stablish on the ISR for the DMA to get rid of this errors the flags remains set (I added a picture of the ISR).  

Once the first data is sent I cannot see any update on the match register on the SCT side but I can see on the register XFERCONFIG on the bits XFERCOUNT that the count of data to be sent out is decreasing every time that the ISR is called... 

I think, I am close to get it done but this has been a big road block.

thanks again Alice.