"Fault Safety Mode" on LPC553x

[JPE]

Hi!

I'm currently working on a motor control project, where the PWM outputs have to be disabled after a trigger from one of the "Fault" inputs (as described in the LPC553x Reference Manual in chapter 43.3.2.12 "Fault Protection").

According to the RM and the LPC5534.h header file, it should be possible to configure a Fault input to a "Safe mode" by setting the according "FSAFEx"-bit in the FCTRL-register.
Quote: "PWM outputs disabled by this fault are not enabled until FSTS[FFLAGx] is clear and FSTS[FFPINx] is clear..."

However, when I test this feature on my hardware, the PWMs can be enabled, even though the Fault input pin is still in its "Active" state and the according FSTS[FFPINx] bit is still set (checked via FreeMaster).

Am I misunderstanding the correct setting for the functionality or could there be an issue in my LPC5534?

BR. Jörn

[JPE]

Hello Alice,

thanks for looking in to this.

The external Fault signal triggers an interrupt, where I have to clear the FFLAG-bits manually to avoid constant re-triggering the interrupt.
So the FFLAG-bits are cleared again after the Fault occurs, while the FFPIN-bit is set as long as I pull the external Fault input pin to GND.

In the interrupt handler I also disable the PWM outputs by clearing the according bits in the OUTEN-register.
After a short delay (5 seconds) the SW tries to enable the PWM outputs again to attempt a restart, and it actually succeeds even though the FFPIN is still set and the FSAFE-function is enabled in the FCTRL-register.

Regarding the FSAFE-function the RM states in chapter 43.8.54 on page 1893
"0001b - Safe mode. PWM outputs disabled by this fault are not enabled until FSTS[FFLAGx] is clear and FSTS[FFPINx] is clear..."

This doesn't seem to be the case in my test, since I can enable the PWM outputs even though FSTS[FFPINx] is still set.

BR. Jörn

[Alice_Yang]

Hello Jörn,

"0001b - Safe mode. PWM outputs disabled by this fault are not enabled until FSTS[FFLAGx] is
clear and FSTS[FFPINx] is clear at the start of a half cycle or full cycle depending on the states
of FSTS[FHALF] and FSTS[FFULL]. "

" the FSAFE bits used to select the safety mode during manual fault clearing. "

In my understanding, in safe mode, we need clear FSTS[FFLAGx]  and FSTS[FFPINx] , then we can use FAULT function. 

BTW, is there PWM output before config FSAFE, I meaning the FAULT can disable PWM output ?

BR

Alice

[JPE]

Hi Alice,

the Fault function is working and the PWMs are disabled when the Fault occurs on the input pin, however, I'm not 100% sure, if it's the Fault function that turns off the PWM or my code in the ISR, that disables the outputs manually by clearing the OUTEN-bits.

The FSTS[FFLAG]-bit is cleared by writing one to it, but the FSTS[FFPIN] flag follows the level on the input pin and is not cleared before the pin goes high again.

But the FSTS[FFPIN] flag state doesn't make any difference regarding the enabling of the PWM outputs, even though the FSAFE-bits in the FCTRL-register is set.
This looks to me as if the FSAFE-functionality is not working correctly.

BR. Jörn

[Alice_Yang]

Hello,

How about first disable the ISR function to confirm PWM FAULT function work well on your side.

Do you use LPCXpresso55s36-evk board? You can send your project to me and tell me the reproduce steps, I can help to check it on my side.

BR

Alice

[JPE · Accepted solution]

Hi Alice,

I disabled the "Fault" interrupt and observed, that the PWM outputs were NOT disabled, even though both according FFPIN- and FFLAG-bits were set in the FSTS register.

So I found out, that the DISMAP-bit for the Fault input I was testing was not set, and therefore the link between the Fault input and the PWM outputs were missing.

After correcting this, the code works as expected and according to the Reference Manual.

Thanks for pointing me in to the correct direction.

BR. Jörn

[Alice_Yang]

Hello,

OK, welcome!

BR

Alice

[Alice_Yang]

Hello,

What about the value with FFLAG? And  what about Fault Disable Mapping Register?

About PWM Fault, recommend you check the figure 228 in UM:

BR

Alice