maximum toggle frequency of GPIO on LPC18xx

[gvk51]

Hi all,

Please let me know what's the max frequency achieved by toggling GPIO pin on LPC18xx running @ 180MHz or less.

I do not have a board to run sample code to test this (board got bricked) please share details or give me pointers in trm where I can find the details.

Toggle not by PWM, just be set or clearing a gpio.

Thanks in advance

[soledad]

Hi,

The base clock for all GPIO blocks is BASE_M3_CLK and the maximun frecuency for BASE_M3_CLK is 180MHz.

For more information about using BASE_M3_CLK, please check the user manual (UM10430), Chapter 12: LPC18xx Clock Generation Unit (CGU).

Have a great day,
Sol

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[gvk51]

Hi Sol,

Thanks for your response,

I have LPC183x-Xplorer board, I am working to toggle a GPIO say GPIO0[8] available on header of the development board, I see the frequency at which it is toggling is around 800KHz. I am looking to generate higher frequency in order of mega hertz, is it possible to do that. Below is the sample code I am working on.

int main(void)
{

    SystemCoreClockUpdate();
    Board_Init();
    unsigned int *CLK_M3_GPIO_CFG = (unsigned int *) 0x40051410;
    unsigned int *CLK_M3_GPIO_STAT = (unsigned int *) 0x40051414;

    DEBUGOUT("System initialized = %d\r\n", Chip_Clock_GetRate(CLK_MX_MXCORE));
    DEBUGOUT("GPIO CFG = %d\r\n", *CLK_M3_GPIO_CFG);
    DEBUGOUT("GPIO STAT = %d\r\n", *CLK_M3_GPIO_STAT);
    while (1) {
        Board_LED_Set(3, LedState);
        LedState = (bool) !LedState;
        //__WFI();
    }
}

How do I ensure that GPIO block is running at BASE_M3_CLK and how to attain higher frequency by toggling GPIO

[rocketdawg2]

You will want to read UM10430.pdf.  You will want to look at the peripheral bit band region.  For details see the ARM-M3 technical reference.    Find the bit band address that corresponds to the LED that you are toggling. (probably want a bit in the NOTx in table 228)  Then writing a 1 to that bit band address is the same as calling Board_LED_Set() only it does so very fast, toggling only one pin of the port.  No firmware solution is guaranteed to provide a uniform clock via GPIO.  Interrupts will interfere, one should run out of RAM rather than FLASH, and the while(1) introduces a jump so the clock will not be symmetrical.

Of course,  high speed signals are really a function of the SCT module and that module deserves study.

[gvk51]

Hi David,

As mentioned we may not achieve uniform clock that is 50% duty cycle. I have tried accessing GPIO controller register and able to achieve clock up-to 10MHz with CPU running at 180MHz. My main interest is to emulate protocol using GPIOs.

I have used the following code to achieve 10MHz

unsigned int *GPIO_PORT0_SET = (unsigned int *) 0x400F6200;
unsigned int *GPIO_PORT0_CLR = (unsigned int *) 0x400F6280;

while (1) {

        *GPIO_PORT0_SET |= 0x300;
        *GPIO_PORT0_CLR |= 0x300;

}

Do you have any reference to MCUs that can achieve frequencies up-to 50MHz by toggling GPIO.

Thanks in advance.

[thefallguy]

Some comments on this

1. Have you done the math?You have a 180Mhz processor and you are trying to write code to toggle GPIO at 50Mhz. That gives you 3.6 instructions to do whatever you want to do and toggle the GPIO. That doesn't loo like it is going to be possible... Even at 400Mhz (and I don't think NXP have an MCU that runs at that speed), you would only have 8 instructions.
2. You can probably do better than 10Mhz in your code example. First, make sure you have compiled and are running optimised ('release') code. There is a huge difference between release and debug code. Coding directly at assembler level can probably save a little more
3. As suggested by @David Thedens, take a look at bit banding. This will save even more time as you will not have to read-modify-write to set a single bit in a register. Bitbanding works by giving every bit, in a 32-bit word (i.e. register) its own address. So, you can just write a 1 to the bit-banded address and it will just write a single bit into the register, leaving the other bits unaffected. Bit-banding is a feature of Cortex-M3, so reading the reference manual should help you understand it.

[gvk51]

Hi Fall Guy,

May be I failed to put my question in a proper way.

My question was, I am asking to suggest me a suitable CPU that can generate clock up-to 50MHz just by toggling GPIO, I understand such CPU would run @ clock in range of GHz.

Bitbanding will not help in my use-case as I will be using all the pins of the GPIO port.

Thanks for your response.

[thefallguy]

Depending on your applications you may be able to use the SGPIO peripheral found onsome NXP MCUs. This video may help

Configurable and Virtual Peripherals SGPIO and SCT|NXP 

[rocketdawg2]

It will be doubtful that you can find such a device.  Once the core speed gets above 200 MHz or so, the clock systems often clock the peripherals and GPIO by using some divisor off the main clock.  They do not run at the CPU speed.

options,

look at section 29 of UM10430.pdf  If your protocol is not very complex, then it might work for you.

or, Use a CPLD to do the heavy pin toggle and use some interface to the ARM

or, You might consider using a FPGA, some are large enough that they embed an ARM core   

Bit banding is very useful for single bit manipulation.  It does a read-modify-write in hardware so as not to disturb other bits in the port.  Not so useful if you have to manipulate many bits at the same time.