can not disable EMC_CLK in Memory interface for LPC43xx

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can not disable EMC_CLK in Memory interface for LPC43xx

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chungyusiang
Contributor I

Hi,

I'm using LPC4357 256 pin ARM for my embedded system and use an external SDRAM (IS42S16160G).

The SDRAM's clk is connected to CLK1(EMC_CLK1) that is the pin T10. I don't use another CLK Pin such as CLK0, CLK2 and CKL3. The four of clock pins (CLK0 ~ 3) will be enable and set to default value to function 0 as a EMC_CLK output. Actually ,I want to disable the CLK0, 2 and 3 because need to solve EMI/EMC issue. I set the pin function mode to function 2 in CLK0 and CLK2, it could work. Clk0 and Clk2 pin don't have any clock signal now. Unfortunately, when i set the Clk3 to mode 2, the MCU will shutdown even could not enter to main function. I have to pull high the pin ISP Mode Pin, if wanna to program it again. Really confuse about this problem, hope everyone could give me some advice.

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Thank You :smileygrin:

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jeremyzhou
NXP Employee
NXP Employee

Hi ChungYu Siang

To use SDRAM, regardless of the EMC data width, you must have all four byte lane feedback clocks configured in the
System Control Unit (SCU). You may use all four CLKx pins, one for each EMC_CLKx signal, by setting SFSCLKx mode to function 0

Alternatively, SFSCLK0 may be configured for combined EMC_CLK01 (function 5), and SFSCLK2 may be configured
for combined EMC_CLK23 (function 5), When CLK0 and CLK2 pins are configured for function 5, CLK1 and CLK3 pins may be used to drive the SDRAM clock pin, or used for a function other than the EMC_CLK.


Have a great day,
Ping

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