Systick activation leads to a high power consumption in Power Down Mode (LPC11u68)

[lpcware]

Content originally posted in LPCWare by fmoyagarcia on Fri May 06 09:49:00 MST 2016
Hi everyone,

I am having problems trying to develop a low power application that uses active, sleep and power down modes.

It seems to me that from the point that I start the SysTick for the first time, I am unable to have a current under 1mA @2,8V.

Also, is the SysTick stopped in Power Down mode in this microcontroller? I have worked with other Cortex M0+ from freescale and they do not stop the SysTick.

Do I have to disable manually the clocks to the peripherals before entering in power down mode?

Thank you very much in advance.

[cwembedded]

Were you able to figure this out? On my uC (LPC12xx) it appears that SysTick is disabled automatically before entering Deep Power Down mode. Manually disabling it has no effect.

However, my current usage on our board is much much higher than 2mA. I believe we have a much more sinister issue.

[lpcware]

bump