Content originally posted in LPCWare by Scribe on Mon Oct 15 06:17:36 MST 2012 Hi guys,
We've noticed that unlike Atmel chips, NXP LPC1200 I/O defaults to using pull-up in reset state and this doesn't play well with our existing circuitry.
We were wondering if there any common practises users of this chip are deploying to design circuits that have a safe reset state when the chip defaults into pull-up? We're both price and space concious and so the use of buffers etc is unideal.
Content originally posted in LPCWare by jdurand on Tue Oct 16 17:30:38 MST 2012 On any pins that need to be low by default, I just add pull-down resistors of a value sufficient to counter the pull-up in the chip under worst-case conditions.
A board I'm working on today has one 1K pull-down resistor on a high-voltage enable line.