Solutions for LPC1768 ADC noise caused by debugging?

cancel
Showing results for 
Search instead for 
Did you mean: 

Solutions for LPC1768 ADC noise caused by debugging?

Jump to solution
438 Views
Contributor II

I am using the Keil uVision5 IDE with the ULINKpro Debug and Trace Adaptor connected to the MCB1700 Evaluation Board. (Target MCU is the NXP LPC1768)

It has been discovered that when in a debug session, analog to digital  conversions are affected with additional noise.

This has been revealed by duplicating the ADC result to the DAC and scoping the output.

Does anyone have a solution/suggestion(s) in regards to the additional noise on ADC samples caused by JTAG/Trace during a debug session?

The NXP Application Note AN10974 mentions this problem without offering a solution - does this mean there is no solution?

1 Solution
43 Views
NXP Employee
NXP Employee

Hi Joseph,

Unfortunately the additional noise introduced by the JTAG during a debug session can't be avoided, one workaround would be to avoid the usage of the debugger during the ADC measurement testing stage of you project and instead save the measured data for further analysis.

Hope it helps!

Best Regards,
Carlos Mendoza
Technical Support Engineer

View solution in original post

0 Kudos
5 Replies
43 Views
Contributor I

I've been having this issue, and it's taken a while to try to figure out if it was an issue with the microprocessor or with my firmware.

That app note AN10974 is a good discovery. I think that information should be also in the errata for the processor, because it's a significant limitation of the processor that has caused me to spend some significant engineering time looking into it. I have the errata sheet ES_LPC176x, and item "ADC.3: Noise caused by nearby I/O pin switching activity or board design/layout could cause the ADC conversion results to be above the expected range." sounds potentially similar. However, in my case, I'm seeing glitches down to zero or towards zero, rather than glitches towards 0xFFF.

It seems to affect mostly AD0[3], on P0.26 (pin 6), which is right next to the SWCLK signal for JTAG on pin 5. To a lesser degree it affects AD0[2], on P0.25 (pin 7). However, if I put an oscilloscope on the pins, I see no visible glitches, so I guess cross-talk must be happening within the micro.

0 Kudos
43 Views
NXP Employee
NXP Employee

You might find the analysis of LPC1768 + ADC done by the mbed team of interest : Getting the best ADC performance from mbed | mbed 

Regards,

LPCXpresso Support

43 Views
Contributor II

Cheers, I've had a look at this.

Filtering and grounding techniques are implemented but I still find the best fix is in not using the debugging tool.

44 Views
NXP Employee
NXP Employee

Hi Joseph,

Unfortunately the additional noise introduced by the JTAG during a debug session can't be avoided, one workaround would be to avoid the usage of the debugger during the ADC measurement testing stage of you project and instead save the measured data for further analysis.

Hope it helps!

Best Regards,
Carlos Mendoza
Technical Support Engineer

View solution in original post

0 Kudos
43 Views
Contributor II

Thanks for your reply. 

I have come to this realisation, I might try using an external ADC.