Sharing SysTick hardware/interrupt between cores.

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 

Sharing SysTick hardware/interrupt between cores.

1,186件の閲覧回数
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by andypevy on Thu Apr 23 03:12:57 MST 2015
Hi,

     I am (or will eventually be) using freeRTOS on the M0 core.

This uses the SysTick timer.

How do I use the same timer on the M4 side ?.

Thanks,
Andy
ラベル(1)
0 件の賞賛
返信
2 返答(返信)

1,172件の閲覧回数
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by andypevy on Thu Apr 23 05:04:04 MST 2015
Aha, OK.

Thanks,
Andy
0 件の賞賛
返信

1,172件の閲覧回数
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by starblue on Thu Apr 23 04:54:10 MST 2015
The system tick timer is an part of the core, and in the case of the LPC541xx both cores have it (its optional on the M0, and for example the M0 on LPC43xx doesn't have it).

So in your case it is no problem to use it both on the M0 and the M4, as these are two separate timers.
0 件の賞賛
返信