Setting LPCXpresso54102 CPU to 150 MHz

[MRenshaw]

I've been trying to get an LPC54102 processor running at 150 MHz and have managed to leave a couple of boards in a un-programmable state (error: "Can't find debug component in ROM table" in Rowley CrossStudio).

I have tried both the code provided in the example projects in SDK_2_6_1_LPCXpresso54102.zip and code generated by the MCUXpresso Config Tool.

This is what the tool generated code looked like:

#include "fsl_power.h"
#include "fsl_clock.h"
#include "clock_config.h"

/* System clock frequency. */
extern uint32_t SystemCoreClock;

void BOARD_InitBootClocks(void)
{
BOARD_BootClockPLL150M();

CLOCK_AttachClk(kIRC12M_to_USART); /* attach 12 MHz clock to USART0 */
CLOCK_EnableClock(kCLOCK_Usart0);
CLOCK_EnableClock(kCLOCK_Usart3);
CLOCK_EnableClock(kCLOCK_Iocon);
CLOCK_EnableClock(kCLOCK_Gpio0);
CLOCK_EnableClock(kCLOCK_Gpio1);
CLOCK_EnableClock(kCLOCK_Rit);
CLOCK_EnableClock(kCLOCK_Spi1);
}

/*******************************************************************************
******************** Configuration BOARD_BootClockPLL150M *********************
******************************************************************************/
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!Configuration
name: BOARD_BootClockPLL150M
outputs:
- {id: ASYNCAPB_clock.outFreq, value: 150 MHz}
- {id: FRG_clock.outFreq, value: 150 MHz}
- {id: MAIN_clock.outFreq, value: 150 MHz}
- {id: System_clock.outFreq, value: 150 MHz}
settings:
- {id: PLL_Mode, value: Normal}
- {id: SYSCON.DIRECTO.sel, value: SYSCON.PLL}
- {id: SYSCON.MAINCLKSELB.sel, value: SYSCON.PLL_BYPASS}
- {id: SYSCON.M_MULT.scale, value: '150', locked: true}
- {id: SYSCON.N_DIV.scale, value: '12', locked: true}
- {id: SYSCON.PLL_BYPASS.sel, value: SYSCON.DIRECTO}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* clang-format on */

/*******************************************************************************
* Variables for BOARD_BootClockPLL150M configuration
******************************************************************************/
/*******************************************************************************
* Code for BOARD_BootClockPLL150M configuration
******************************************************************************/
void BOARD_BootClockPLL150M(void)
{
/*!< Set up the clock sources */
/*!< Set up IRC */
POWER_DisablePD(kPDRUNCFG_PD_IRC_OSC); /*!< Ensure IRC OSC is on */
POWER_DisablePD(kPDRUNCFG_PD_IRC); /*!< Ensure IRC is on */
CLOCK_AttachClk(kIRC12M_to_MAIN_CLK); /*!< Switch to IRC 12MHz first to ensure we can change voltage without accidentally
being below the voltage for current speed */

/*!< Set up PLL */
CLOCK_AttachClk(kIRC12M_to_SYS_PLL); /*!< Switch SYSPLLCLKSEL to IRC12M */
POWER_DisablePD(kPDRUNCFG_PD_SYS_PLL); /*!< Ensure PLL is on */
const pll_setup_t pllSetup = {
.syspllctrl = SYSCON_SYSPLLCTRL_BANDSEL_MASK | SYSCON_SYSPLLCTRL_SELI(26U) | SYSCON_SYSPLLCTRL_SELP(31U) | SYSCON_SYSPLLCTRL_DIRECTO_MASK,
.syspllndec = SYSCON_SYSPLLNDEC_NDEC(199U),
.syspllpdec = SYSCON_SYSPLLPDEC_PDEC(2U),
.syspllssctrl = {(SYSCON_SYSPLLSSCTRL0_MDEC(9637U) | SYSCON_SYSPLLSSCTRL0_SEL_EXT_MASK),0x0U},
.pllRate = 150000000U,
.flags = PLL_SETUPFLAG_WAITLOCK
};
CLOCK_SetPLLFreq(&pllSetup); /*!< Configure PLL to the desired values */

POWER_SetVoltageForFreq(150000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
CLOCK_SetFLASHAccessCyclesForFreq(150000000U); /*!< Set FLASH wait states for core */

/*!< Set up dividers */
CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Set AHBCLKDIV divider to value 1 */
SYSCON->ASYNCAPBCTRL = SYSCON_ASYNCAPBCTRL_ENABLE_MASK; /*!< Enable ASYNC APB subsystem */
Clock_SetAsyncClkDiv(1U); /*!< Set ASYNCCLKDIV divider to value 1 */
ASYNC_SYSCON->FRGCTRL = ((ASYNC_SYSCON->FRGCTRL & ~ASYNC_SYSCON_FRGCTRL_MULT_MASK) | ASYNC_SYSCON_FRGCTRL_MULT(0U)); /*!< Set FRG MULT to value 0 */
ASYNC_SYSCON->ASYNCAPBCLKCTRL |= ASYNC_SYSCON_ASYNCAPBCLKCTRL_FRG0_MASK; /*!< Enable FRG clock */

/*!< Set up clock selectors - Attach clocks to the peripheries */
CLOCK_AttachClk(kSYS_PLL_OUT_to_MAIN_CLK); /*!< Switch MAIN_CLK to SYS_PLL_OUT */

/*!< Set SystemCoreClock variable. */
SystemCoreClock = BOARD_BOOTCLOCKPLL150M_CORE_CLOCK;
}

This is what the original example code looked like:

#include "fsl_power.h"
#include "fsl_clock.h"
#include "clock_config.h"

/* System clock frequency. */
extern uint32_t SystemCoreClock;

void BOARD_InitBootClocks(void)
{
BOARD_BootClockPLL150M();

CLOCK_AttachClk(kIRC12M_to_USART); /* attach 12 MHz clock to USART0 */
CLOCK_EnableClock(kCLOCK_Usart0);
CLOCK_EnableClock(kCLOCK_Usart3);
CLOCK_EnableClock(kCLOCK_Iocon);
CLOCK_EnableClock(kCLOCK_Gpio0);
CLOCK_EnableClock(kCLOCK_Gpio1);
CLOCK_EnableClock(kCLOCK_Rit);
CLOCK_EnableClock(kCLOCK_Spi1);
}

/*******************************************************************************
******************** Configuration BOARD_BootClockPLL150M *********************
******************************************************************************/
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!Configuration
name: BOARD_BootClockPLL150M
called_from_default_init: true
outputs:
- {id: ASYNCAPB_clock.outFreq, value: 150 MHz}
- {id: FRG_clock.outFreq, value: 150 MHz}
- {id: MAIN_clock.outFreq, value: 150 MHz}
- {id: System_clock.outFreq, value: 150 MHz}
settings:
- {id: PLL_Mode, value: Normal}
- {id: SYSCON.DIRECTO.sel, value: SYSCON.PLL}
- {id: SYSCON.MAINCLKSELB.sel, value: SYSCON.PLL_BYPASS}
- {id: SYSCON.M_MULT.scale, value: '150', locked: true}
- {id: SYSCON.N_DIV.scale, value: '12', locked: true}
- {id: SYSCON.PLL_BYPASS.sel, value: SYSCON.DIRECTO}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* clang-format on */

/*******************************************************************************
* Variables for BOARD_BootClockPLL150M configuration
******************************************************************************/
/*******************************************************************************
* Code for BOARD_BootClockPLL150M configuration
******************************************************************************/
void BOARD_BootClockPLL150M(void)
{
/*!< Set up the clock sources */
/*!< Set up IRC */
POWER_DisablePD(kPDRUNCFG_PD_IRC_OSC); /*!< Ensure IRC OSC is on */
POWER_DisablePD(kPDRUNCFG_PD_IRC); /*!< Ensure IRC is on */
CLOCK_AttachClk(kIRC12M_to_MAIN_CLK); /*!< Switch to IRC 12MHz first to ensure we can change voltage without
accidentally being below the voltage for current speed */

/*!< Set up PLL */
CLOCK_AttachClk(kIRC12M_to_SYS_PLL); /*!< Switch SYSPLLCLKSEL to IRC12M */
POWER_DisablePD(kPDRUNCFG_PD_SYS_PLL); /*!< Ensure PLL is on */
const pll_setup_t pllSetup = {
.syspllctrl = SYSCON_SYSPLLCTRL_BANDSEL_MASK | SYSCON_SYSPLLCTRL_SELI(26U) | SYSCON_SYSPLLCTRL_SELP(31U) |
SYSCON_SYSPLLCTRL_DIRECTO_MASK,
.syspllndec = SYSCON_SYSPLLNDEC_NDEC(199U),
.syspllpdec = SYSCON_SYSPLLPDEC_PDEC(2U),
.syspllssctrl = {(SYSCON_SYSPLLSSCTRL0_MDEC(9637U) | SYSCON_SYSPLLSSCTRL0_SEL_EXT_MASK), 0x0U},
.pllRate = 150000000U,
.flags = PLL_SETUPFLAG_WAITLOCK};
CLOCK_SetPLLFreq(&pllSetup); /*!< Configure PLL to the desired values */

POWER_SetVoltageForFreq(
150000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
CLOCK_SetFLASHAccessCyclesForFreq(150000000U); /*!< Set FLASH wait states for core */

/*!< Set up dividers */
CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Set AHBCLKDIV divider to value 1 */

/*!< Set up clock selectors - Attach clocks to the peripheries */
CLOCK_AttachClk(kSYS_PLL_OUT_to_MAIN_CLK); /*!< Switch MAIN_CLK to SYS_PLL_OUT */

/*< Set SystemCoreClock variable. */
SystemCoreClock = BOARD_BOOTCLOCKPLL150M_CORE_CLOCK;
}

Trying to build and run both of these has left these boards in an unprogrammable state.

Before attempting this, the boards were running at 96MHz and had no issues.

Is there something I have missed that would cause this issue/what would be the correct way to get them running at 150MHz? And is there a simple way to fix the state that these boards are in?

[Alice_Yang]

Hello MRenshaw,

I use MCUXpresso IDE with clocks configuration tool , configure the CPU to 150M, based on led demo, it can work well, I attached it for you, you can refer to.

BR

Alice