SHA 256 Calculation LPC55S28 - BUG in fsl_hascrypt.c ?

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 

SHA 256 Calculation LPC55S28 - BUG in fsl_hascrypt.c ?

ソリューションへジャンプ
1,641件の閲覧回数
Baur_phg
Contributor I

I have a few questions about the SHA function and the implementation in the FSL drivers fsl_hashcrypt.c.

I need the SHA checksum to check the firmware in the internal flash memory

I am currently using version 11 of the LPC55S28 SDK and the HASHCRYPT_SHA() function there

1. Is it possible to use a flash memory area directly as a source in register MEMADDR, according to the LPC manual only SRAM0 or SRAMX can be used, but the version with direct flash access is also suggested here in the forum, or does the flash data have to be copied to the RAM first? .

The calculation with the flash memory actually worked without any problems and also generated correct SHA checksums.

2. There seems to be a bug in the FSL drivers in the fsl_hashcrypt.c module. The functions of the SHA calculation, e.g. hashcrypt_sha_process_message_data, only evaluate the HASHCRYPT_STATUS_DIGEST_MASK but not HASHCRYPT_STATUS_ERROR_MASK in the event of an error, the drivers never come back and the watchdog strikes. This happens when trying to calculate the SHA of a deleted Flashpage, where the HASHCRYPT_STATUS_ERROR_MASK flag is set.

We are currently using the SDK version 11, but the query is also identical in version 12. The start address of the flash memory is aligned. (0x20000)

3. The SHA drivers do not check the length of the data, if more than the possible 2047 blocks 131008 bytes are specified, there is no error message but an incorrect SHA

It would be great if someone could help me with the issues.

ラベル(1)
0 件の賞賛
返信
1 解決策
1,588件の閲覧回数
xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

This is the feedback from AE engineer:

"

As stated in UM, SHA engine can read from SRAM or flash.

xiangjun_rong_0-1676602560229.png

 

2. The root cause is LPC5500 flash cannot be read after erase operation. I have created a ticket to SDK team to improve this issue.

3. This is a SDK issue, the SDK driver doesn't check the length of the content. I have created a SDK ticket for the issue.

"

Hope it can help you

BR

XiangJun Rong

元の投稿で解決策を見る

0 件の賞賛
返信
4 返答(返信)
1,515件の閲覧回数
Baur_phg
Contributor I

Thanks for the answer and the help,

In the UM register description of the memory address register MEMADDR, only the SRAM is specified, thats why i was a little bit confused

I modified the sha function and check the HW Error Flag, now it returns with Error Status if the Flash is not programmed.

now it works as expected

Thanks

0 件の賞賛
返信
1,589件の閲覧回数
xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

This is the feedback from AE engineer:

"

As stated in UM, SHA engine can read from SRAM or flash.

xiangjun_rong_0-1676602560229.png

 

2. The root cause is LPC5500 flash cannot be read after erase operation. I have created a ticket to SDK team to improve this issue.

3. This is a SDK issue, the SDK driver doesn't check the length of the content. I have created a SDK ticket for the issue.

"

Hope it can help you

BR

XiangJun Rong

0 件の賞賛
返信
1,595件の閲覧回数
xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi, Baur

Can you tell us the target application? The item is required by the AE team.

BR

XiangJun Rong

0 件の賞賛
返信
1,618件の閲覧回数
xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

I have asked AE  security team, I will answer your question after I get feedback.

BR

XiangJun Rong

0 件の賞賛
返信