Hi NXP Team!
I'm a little confused on how SGPIO samples. What I have at the moment is a loop-back to understand how these slices work.
My setup:
SGPIO 10 set to use external clk pin on SGPIO 9 and I was able to get some data just fine.
My confusion here is I realized my data out and data in were using rising edge to transmit and receive the data. My understanding so far is when we transmit the data we do that on one edge, then sample on the other edge. Is there any references that can explain how data is sampled into a slice?
Thanks!
Hi,
Pls refer to the application note an11343.pdf from the link:
As the following Fig, if you use external clock, you can select the clock edge to shift data by using the external clock or inverter of external clock. If you use internal clock SGPIO_clock, you can not select the edge.
Hope it is helpful.
BR
XiangJun Rong