Sorry, I still don't understand it.
Table 14 does not mention anything about powerup/down modes ?
it says:
"The supply current per peripheral is measured as the difference in supply current between
the peripheral block enabled and the peripheral block disabled in the SYSAHBCLKCFG
and PDRUNCFG (for analog blocks) registers. All other blocks are disabled in both
registers and no code accessing the peripheral is executed. Measured on a typical
sample at Tamb = 25 C."
It does only say something about the (digital) current at 2 clock frequencies, 12 and 30 MHz. It does not mention anything with regards to the power into Vdda (analog supply input) ?
Table 12 lists the operating conditions (voltages) for Vdd, Vdda and Vref. Table 13 says something about the Idd but NOT the IddA.