PLL using external crystal oscillator

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PLL using external crystal oscillator

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chinmaygore
Contributor I

Hi All,

I am using LPC11E68 and trying to run the PLL on external crystal oscillator of 12MHz.

It works fine when the PLL input clock source is IRC oscillator, but doesn't work when it switched to crystal oscillator.

Here in my code, I have followed the steps which I have given below:

1. Setup IRC oscilltor as input clock source to PLL. Got PLL output of 12MHz by setting the appropriate values. Selected Main clock source as PLL output.

2. Enable clock to IOCON Block.

3. Set up PIO2_0 and PIO2_1 as function 1(XTALIN and XTALOUT) and enabled Analog mode.

4. Now I set the crystal oscillator to input clock source to PLL.

   LPC_SYSCTL->SYSPLLCLKSEL  = 1;

and updated the clock source .

5. Powered down PLL power, set the msel and psel values and then powered the PLL up.

6. Waited for PLL lock

7. Set the system clock divider as 1.

8. Disabled bypass bit and selected freq range: Low. 1 - 20 MHz in SYSOSCCTRL

8. Selected Main clock source as PLL output.

Still it is not working on external crystal.

I would be grateful if anyone could help me in this regards.

Thank you!

- Chinmay

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Dezheng_Tang
NXP Employee
NXP Employee

To isolate the problem, try to set MAINCLK to use external OSC first without PLL first. If the external OSC doesn't work as MAINCLK, check PDRUNCFG register bit 5 (SYSOSC_PD) and make sure it's cleared. You need to do that before the clock switching. 

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chinmaygore
Contributor I

Hi Dezheng,

Thanks for the reply.

There is no provision given to set main clock as external oscillator directly. (page 43 table 37 http://www.nxp.com/documents/user_manual/UM10732.pdf). You can either set it up as PLL input or PLL output. So I selected PLL Clock source as crystal oscillator and main clock source as PLL Input. Then It showed the main clock correctly. But when I pass this clock through PLL, and select main clock source as PLL output, no clock signal is observed.

This is the code snippet after I clear PDRUNCFG register bit 5.

        LPC_SYSCTL->SYSPLLCLKSEL  = 1;//Select PLL Clock Source as CRYSTAL OSC
        LPC_SYSCTL->SYSPLLCLKUEN  = 0;
        LPC_SYSCTL->SYSPLLCLKUEN  = 1;// Update clock source
        LPC_SYSCTL->PDRUNCFG |= (1 << 7);//Power down PLL
        LPC_SYSCTL->SYSPLLCTRL = (0 & 0x1F) | ((3 & 0x3) << 5);//12 MHz
        LPC_SYSCTL->PDRUNCFG &= ~(1 << 7);//Power UP PLL
        while((LPC_SYSCTL->SYSPLLSTAT & 1) == 0); //Wait for PLL lock
        LPC_SYSCTL->SYSAHBCLKDIV  =  1;

        /*Set system oscillator control register*/
        LPC_SYSCTL->SYSOSCCTRL = 0x00; //Disable bypass bit and freq range: Low. 1 - 20 MHz
        LPC_SYSCTL->MAINCLKSEL  = 0x03; //Set maijn clock source as PLL Output
        LPC_SYSCTL->MAINCLKUEN  = 0x00;
        LPC_SYSCTL->MAINCLKUEN  = 0x01; // Update clock source

I'd be grateful if you could throw some light on this.

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Dezheng_Tang
NXP Employee
NXP Employee

Set PLL input as external OSC, PLL input as main clock, then main clock runs from external OSC.

Plenty of S/W for this part:

http://www.nxp.com/products/software-and-tools/hardware-development-tools/lpcxpresso-boards/lpcopen-...

Also see below.

      /*Set system oscillator control register*/

        LPC_SYSCTL->PDRUNCFG &= ~(1 << 5);//Power UP SYS OSC

        LPC_SYSCTL->SYSOSCCTRL = 0x00; //Disable bypass bit and freq range: Low. 1 - 20 MHz

        for ( i = 0; i < 0x400; i++ );                     // 500us delay is needed after SYS OSC is powered up.                 

        LPC_SYSCTL->SYSPLLCLKSEL  = 1;//Select PLL Clock Source as CRYSTAL OSC
        LPC_SYSCTL->SYSPLLCLKUEN  = 0;
        LPC_SYSCTL->SYSPLLCLKUEN  = 1;// Update clock source

  #If USE_OSC_NO_PLL // main clock from PLL input while PLL input uses external OSC.

        LPC_SYSCTL->MAINCLKSEL  = 0x01; //Set main clock source as PLL Input
        LPC_SYSCTL->MAINCLKUEN  = 0x00;
        LPC_SYSCTL->MAINCLKUEN  = 0x01; // Update clock source

#else     // main clock from PLL output while PLL input uses external OSC.
        LPC_SYSCTL->PDRUNCFG |= (1 << 7);//Power down PLL
        LPC_SYSCTL->SYSPLLCTRL = (0 & 0x1F) | ((3 & 0x3) << 5);//12 MHz
        LPC_SYSCTL->PDRUNCFG &= ~(1 << 7);//Power UP PLL
        while((LPC_SYSCTL->SYSPLLSTAT & 1) == 0); //Wait for PLL lock

        LPC_SYSCTL->MAINCLKSEL  = 0x03; //Set maijn clock source as PLL Output
        LPC_SYSCTL->MAINCLKUEN  = 0x00;
        LPC_SYSCTL->MAINCLKUEN  = 0x01; // Update clock source

#endif

        LPC_SYSCTL->SYSAHBCLKDIV  =  1;

if needed,configure CLKOUT to 0x1 or 0x3, monitor CLKOUT, MAINCLK should be the same as external OSC.

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