Missing information on LPC55S69 flash memory map

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Missing information on LPC55S69 flash memory map

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scottm
Senior Contributor II

I'm porting my bootloader to the LPC55S69 and I'm trying to nail down the exact flash memory map for the device and having an unexpectedly tough time of it.

Table 4 shows flash from 0x00000 to 0x9ffff and says that "The last 16 pages (10 KB) are reserved" - the problem here is that the pages are 512 bytes, which comes out to 8 kB. At least one of these numbers seems to be wrong.

The linker definition file provided by MCUX gives 0x00000 to 0x9d800 as the usable program flash region. Table 272 shows the PFR region starting at 0x9de00. That means the PFR takes up 17 pages.

This leaves 1536 bytes or 3 pages unaccounted for between 0x9d800 and 0x9de00.

Additionally, the PEMicro programming algorithm provided (nxp_lpc55s69_1x32x160k.arp) gives a flash size of 0x98000, not 0x9d800. The PFR algorithm shows a start address of 0x9de00 for the PFR.

So how big is the usable flash region? Is it 0x98000? 0x9d800? 0x9de00? There's a discrepancy of 23 kB between these possibilities.

Scott

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scottm
Senior Contributor II

OK, what's located between 0x9d800 and 0x9de00, where the manual says the start of the PFR is? That 1.5 kB would be enough for me to store an entire bootloader. I want to make sure I'm not wasting space.

The "10 KB" part from the manual matches, but where does "16 pages" come from? 10 kB is 20 pages.

Any idea why the programming algorithm is limited to 0x98000?

Thanks,

Scott

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

Anyway, the space from 0x9_D800 to 0x9DE00 is reserved internally, it is not allowed to be used by customer.

BR

XiangJun Rong

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scottm
Senior Contributor II

You've got to be kidding me. Where does that number come from? It directly contradicts your last post saying that "The flash size user can use is from 0x0_0000 to 0x9_D7FF for LPC55S69." So there's 22 kB reserved for some undocumented purpose? Why does that disagree with the MCUX linker file, which says 0x9d800?

I think it's more likely you misread 98000 as 9d800, but that perfectly illustrates why I don't trust these numbers. Clearly mistakes have been made somewhere.

To recap, here are our possible values for the top of user flash:

98000 P&E algorithm top of flash
9d800 .ld file, 10 kB from top (per manual)
9de00 Start of PFR per manual
9e000 16 pages from top (also per manual, definitely wrong)

The manual says "The last 16 pages (10 KB) are reserved on the 640 KB flash devices resulting in 630 KB internal flash memory." 16 pages is 8 kB, not 10 kB. If this statement is the only source for the 9d800 figure then I don't trust it because someone didn't check their work.

This deserves an erratum, in my opinion. If there is indeed a reserved 3-page area between 9d800 and 9de00, that should be listed in some memory map somewhere. The PFR has a complete memory map in figure 13 and it starts at 9de00.

Scott

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

I am sorry, it is a typo, it should have been "Anyway, the space from 0x9_D800 to 0x9_DE00 is reserved internally, it is not allowed to be used by customer".

It is said that the space from 0x9_D800 to 0x9_DE00 is reserved for ECC(Error Correction Code) for LPC55S69, but it is not confirmed.

BR

XiangJun Rong

 

 

 

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

Pls refer to the application note an12949.pdf

https://www.nxp.com.cn/docs/en/application-note/AN12949.pdf

xiangjun_rong_0-1686192130766.png

The flash size user can use is from 0x0_0000 to 0x9_D7FF for LPC55S69.

Hope it can help you

BR

XiangJun Rong

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