LPS55S69 : power_manager_lpc

[EugeneHiihtaja]

Hi !

I have taken in use power_manager_lpc example from SDK and it work fine and able to wakeup from PowerDown mode

due GINTx and RTC events.

I modify it a bit and both GINTx and RTC is able to wakeup and clock resturns back to 150Mhz.

POWER_EnterPowerDown((kPDRUNCFG_PD_LDOMEM | kPDRUNCFG_PD_FRO32K), 0x7FFF,
WAKEUP_GPIO_GLOBALINT0 | WAKEUP_GPIO_GLOBALINT1 | WAKEUP_RTC_LITE_ALARM_WAKEUP, 1);

BOARD_BootClockFRO12M();
BOARD_InitDebugConsole();
BOARD_BootClockPLL150M();

But If I take example with secure world usage e.g. hello_world_s/ns  and do similar usage of everything in secure world

-> system is not wakeup due any events.

power_s version of power library is taken in use and GINTx processed on secure side and backup area is visible for save cpu retention data.

PowerLib version 0x10000

What kind of precondition or miss configuration of TZ gates should be added to that example ?

May be something is not enabled but no any crash and etc.

Do you have any example where EnterPower down is happens on secure side ?

Regards,

Eugene

[EugeneHiihtaja]

Hi !

Activation of HardFault show some problems:

Entering HardFault interrupt!
SCB->BFSR:IBUSERR fault: Instruction bus error on an instruction prefetch.

Additional AHB secure controller error information:
Secure error at AHB layer 0.
Address that caused secure violation is 0x3012534.
Secure error caused by bus master number 0.
Security level of master 3.
Secure error happened during read code access.

Looks like powerlib_s at secure side try to access ROM  code area and it counted  as secure violation.

If in TZ settings I uncheck box "Enable secure check for AHB matrix" it starts to work fine.

Could it be some problems with power lib or why secure checking is failed  ?

Regards,

Eugene

[Sabina_Bruce]

Hello Eugene,

The IBUSERR can be caused by:

a) Branch to invalid memory regions for example caused by incorrect function pointers.

b) Invalid return due to corrupted stack pointer or stack content.

c) Incorrect entry in the exception vector table.

Could you please check the TEE configuration tool to see how your securty distribution map is, as shown below.

This way we can see the actual status of a particular location.

Best Regards,

Sabina

[EugeneHiihtaja]

Hi Sabina !

Can it be so that power_s library require access to ROM code and it works if access right to it set in S-priv only.

Even power_s  run on secure side and should access all memory areas. ROM code must be set to S-Priv only.

Like power_s library should have some preconditions what is not fully clear from UM/DS.

Regards,

Eugene