LPC55xx ADC and DMA FIFO wartermark trigger

取消
显示结果 
显示  仅  | 搜索替代 
您的意思是: 
已解决

LPC55xx ADC and DMA FIFO wartermark trigger

跳至解决方案
1,880 次查看
johanleroy
Contributor I

Hi,

 

I am trying to get the DMA trigger working with the ADC.

The example application does a software trigger to start the DMA transfer. This doesn't have any advantage at all compared to copy the values manually to an array. What I would like to do is automatically start the DMA transfer after the FIFO watermark is reached. 

I tried enabling the REQ_ENA21 (ADC0 FIFO 0) in the INPUTMUX register but that doesn't seem to work.

Any help would be greatly appreciated.

 

Kind regards

 

Johan

0 项奖励
回复
1 解答
1,872 次查看
Alice_Yang
NXP TechSupport
NXP TechSupport
0 项奖励
回复
2 回复数
1,851 次查看
gertvb
Contributor III

Hallo Johan and Alice!

Please Just be careful with the code that I posted last year!

I've picked up that the ADC and DMA seems to lose sync somehow, and that what I think is ADC[0] value ends up randomly in buffer[n] value instead of in buffer[0]

I've been up and down in the code and in the configuration the last month, since I picked up the problem, and have more or less changed every parameter in the configtools setup, but to no avail.....

I am now flushing the fifo buffer on every 100th dma callback to try and fix the issue

Also note that my original ADC clock speed of 6MHz was also incorrect and that I changed it to 24MHz

Groete

Gert van Biljon

A TechExplorer working with Embedded Software and Electronics in Agriculture and Alternative Energy
0 项奖励
回复
1,873 次查看
Alice_Yang
NXP TechSupport
NXP TechSupport

Hello Johan,

 

You can have a look at this thread:

https://community.nxp.com/t5/LPC-Microcontrollers/Using-Configtools-to-set-up-ADC-and-DMA-from-scrat...  

 

BR

Alice

0 项奖励
回复