Hallo Johan and Alice!
Please Just be careful with the code that I posted last year!
I've picked up that the ADC and DMA seems to lose sync somehow, and that what I think is ADC[0] value ends up randomly in buffer[n] value instead of in buffer[0]
I've been up and down in the code and in the configuration the last month, since I picked up the problem, and have more or less changed every parameter in the configtools setup, but to no avail.....
I am now flushing the fifo buffer on every 100th dma callback to try and fix the issue
Also note that my original ADC clock speed of 6MHz was also incorrect and that I changed it to 24MHz
Groete
Gert van Biljon
A TechExplorer working with Embedded Software and Electronics in Agriculture and Alternative Energy