LPC55S69 can not be detected by Jlink SWD

[37139023]

Hi，

My board can not connect with jlink(SWD) when the device was erased all chip(even setting in isp mode), But when down load a example code  through usb isp ,it can connect with jlink again.

In the lpc55s69 device User manual (UM11126):

"The LPC55S6x/LPC55S2x/LPC552x probes the active peripheral from one of below serial interfaces, and download image from the probed peripherals: UART0, I2C1, SPI3, HS_SPI, USB0 or USB1"

" When the Cortex-M33 starts the bootloader, the SWD access is disabled and therefore, the debugger is unable to connect to the CPU during this period of time. The boot ROM determines the boot mode based on the reset state of the ISP pins."

Does a new chip have to load code through isp before it can connect to the emulator? Isp has a higher priority than swd?

[Alice_Yang]

Hello,

"Does a new chip have to load code through isp before it can connect to the emulator?"

-> No. Usually needn't isp , board can debug well.

In sometimes, for example download a image that the board can't connect to debug by chance, we can

use ISP mode to erase chip, then try to connect again.

Now you can take a video or screenshot show your steps and debug information on your side, includes which IDE, thanks.

Regards,

Alice