LPC55S69: WWDT_Init hangs during TV register value check

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 

LPC55S69: WWDT_Init hangs during TV register value check

ソリューションへジャンプ
1,387件の閲覧回数
pbjones
Contributor I

I'm attempting to enable the WWDT timer on the LPC55S69. Unfortunately, my program hangs during a call to WWDT_Init. Any help would be appreciated and let me know if I can provide more information.

Below is the code I'm using to start the watchdog:

wwdt_config_t watchdog_config;
WWDT_GetDefaultConfig(&watchdog_config);
watchdog_config.timeoutValue = 0xFF * 2900;
watchdog_config.warningValue = 0xFF * 100;
WWDT_Init(WWDT, &watchdog_config);

The application hangs in WWDT_Init, specifically in this code that waits for the wwdt timer start:

if (config->enableWwdt)
{
while (base->TV == 0xFFUL)
{
}
}

 I've printed out the values of the WWDT registers in the debugger while the program is stuck:

(gdb) p /x *((WWDT_Type *)0x5000C000u)
$2 = {MOD = 0x1, TC = 0xb48ac, FEED = 0x0, TV = 0xff, RESERVED_0 = {0x0, 0x0, 0x0, 0x0},
WARNINT = 0x39c, WINDOW = 0xffffff} 

 

0 件の賞賛
返信
1 解決策
1,359件の閲覧回数
pbjones
Contributor I

Thanks for pointing me towards the example. I was able to successfully initialize the WWDT. The steps that I was missing were enabling the FRO 1M clock and setting the WWDT clock divider:

 /* Enable FRO 1M clock for WWDT module. */
SYSCON->CLOCK_CTRL |= SYSCON_CLOCK_CTRL_FRO1MHZ_CLK_ENA_MASK;
/* Set clock divider for WWDT clock source. */
CLOCK_SetClkDiv(kCLOCK_DivWdtClk, 1U, true);

元の投稿で解決策を見る

0 件の賞賛
返信
2 返答(返信)
1,371件の閲覧回数
ZhangJennie
NXP TechSupport
NXP TechSupport

Hi pbjones 

Under MCUxpresso SDK, there is demo wwdt_example. Please refer it for wwdt initialization and usage.

Hope this helps,

Jun Zhang

0 件の賞賛
返信
1,360件の閲覧回数
pbjones
Contributor I

Thanks for pointing me towards the example. I was able to successfully initialize the WWDT. The steps that I was missing were enabling the FRO 1M clock and setting the WWDT clock divider:

 /* Enable FRO 1M clock for WWDT module. */
SYSCON->CLOCK_CTRL |= SYSCON_CLOCK_CTRL_FRO1MHZ_CLK_ENA_MASK;
/* Set clock divider for WWDT clock source. */
CLOCK_SetClkDiv(kCLOCK_DivWdtClk, 1U, true);
0 件の賞賛
返信