LPC55S69 : FMC configuration register

[EugeneHiihtaja]

Hello !

I can see in all examples in SDK is only FLASHTIM is set .

But what about enable flash prefetch and acceleration bits ?

They never enabled. Why ? They should work with silicon 1B.

How to handle those ?

Can I enable those at the same time when FLASHTIM is changed ?

Should I invalidate/flush those caches when use Flash API from Bootrom ?

Or when I encrypt/decrypt on fly if PRINCE peripheral is in use.

In K82 time it was always separate API to handle those issues.

Regards,

Eugene

[Sabina_Bruce]

Hello Eugene, 

But what about enable flash prefetch and acceleration bits ?

They never enabled. Why ? They should work with silicon 1B.

Yes you should be able to enable these without a problem. The SDK examples are not designed to show the optimum behavior, instead we provide base examples that show how the peripherals should work. Though any additional modifications to optimize or customize should be made by customers.

How to handle those ?

Can I enable those at the same time when FLASHTIM is changed ?

You may enable them as you mention. However please consider the following points.

Please confirm the revision you are working with and disable the prefetch bit must be disabled prior to executing flash commands.

Best Regards,

Sabina

[EugeneHiihtaja]

Hi Sabina !

Yes, I have A2 board revision and expect there 1B version of bootloader.

Regards,

Eugene