LPC55S69 CASPER performances detail

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

LPC55S69 CASPER performances detail

Jump to solution
806 Views
albertobattistello
Contributor II

Hi, In the AN12445 rev. 4, 10/2020, the performances of Figure 8 are illustrated with the columns titles "Flash" and "RAM". I have found no details of what the "Flash" and "RAM" columns mean. Could you please provide an explanation on their difference? Do the SDK allows achieving Flash or RAM performances?

Best regards,

AB

Labels (2)
Tags (1)
0 Kudos
1 Solution
799 Views
xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

As you know that the LPC55xx has on-chip flash and on-chip RAM, both the on-chip Flash and RAM can be used to save application code and run from them directly. The LPC55S69 for example can run at 150mhz, but reading/executing  code from flash requires delay clock, which can be set with the FLASHTIM bits in FMC configuration register. But If you run in on-chip SRAM, delay is not needed, so running in on-chip SRAM is faster than that of running in on-chip flash. user can copy code application code from flash to SRAM and execute in SRAM directly.

For the memory map, pls refer to Chapter 2: LPC55S6x/LPC55S2x/LPC552x Memory Map in UM11126.pdf

Hope it can help you

BR

XiangJun Rong

 

xiangjun_rong_0-1643092629441.png

 

View solution in original post

0 Kudos
2 Replies
787 Views
albertobattistello
Contributor II

Thank you very much for your fast response.

Best regards,

AB

0 Kudos
800 Views
xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

As you know that the LPC55xx has on-chip flash and on-chip RAM, both the on-chip Flash and RAM can be used to save application code and run from them directly. The LPC55S69 for example can run at 150mhz, but reading/executing  code from flash requires delay clock, which can be set with the FLASHTIM bits in FMC configuration register. But If you run in on-chip SRAM, delay is not needed, so running in on-chip SRAM is faster than that of running in on-chip flash. user can copy code application code from flash to SRAM and execute in SRAM directly.

For the memory map, pls refer to Chapter 2: LPC55S6x/LPC55S2x/LPC552x Memory Map in UM11126.pdf

Hope it can help you

BR

XiangJun Rong

 

xiangjun_rong_0-1643092629441.png

 

0 Kudos