LPC55S28 ADC trigger status never becomes "complete"

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LPC55S28 ADC trigger status never becomes "complete"

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CanolCael
Contributor II

Hello, we have an application where we have a trigger, which triggers an ADC sampling command which samples multiple channels and creates 6 FIFO entries in total.

The trigger works and we end up with 6 entries in the FIFO, but the way we detect that the operation has finished doesn't behave as we expected. There is a TSTAT register (trigger status register) which has flags for each trigger to tell if a trigger has completed. When a trigger is the corresponding flag becomes 1. But when we check the corresponding flag in a while loop like below:

while (!(LPADC_GetTriggerStatusFlags(ADC0)& (1 << 16)));

 This loop never exits (we are using trigger 0 by the way). In fact, the whole register's value always stays 0.

So, we ended up checking until there are available entries in the FIFO in a while loop, and that works.

My question is why does the while loop above does not work? I tried it with the lpadc_polling example that comes with the example as well, and the loop does not exit there either. TSTAT register's value always stays as 0, although ADC values become available in the FIFO.

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Alice_Yang
NXP TechSupport
NXP TechSupport

Hello ,

Hello,

How do you configure "TCOMP_IE"

Alice_Yang_0-1659947816719.png

BR

Alice

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CanolCael
Contributor II

Hi Kalaimani, I wasn't using interrupts, I was just polling. Does that mean if I don't set up the interrupts, that corresponding TSTAT bit will never be 1?

BTW, I checked the exception bits as well, they are also 0.

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KalaimaniArumugamdev
Contributor III

hi @CanolCael,

    If you're not enabled with this "TCOMP_IE" register means you wouldn't receive those TSTAT- TCOMP FLAG.  

   In case your trigger woking fine mean than check ADC0->STAT->TRGACT this

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KalaimaniArumugamdev
Contributor III

Hi CanolCael,

      First think,  above while loop works for only trigger 0 also if it's called the interrupt routine means this bit will set otherwise it's become zero. So that the register not set in both mode and check ADC trigger configurations.

    Also,Ensure 6 trigger sequence and check ADC trigger exception in TSTAT(0-15)

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