LPC5536 hard fault during clock config

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LPC5536 hard fault during clock config

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989件の閲覧回数
WDA
Contributor I

About once in every twenty boots, I get a hard fault during clock config:

WDA_0-1668201917746.png

If I insert a delay before the divider setup (commented out in the above picture), I don't get faults anymore. Has anyone seen this kind of problem before, or know what might cause it? This is on a custom board with a 24MHz crystal.

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961件の閲覧回数
WDA
Contributor I

After talking with some FAEs from Avnet, we discovered that the Config Tools do not generate the code to wait for the XO_READY bit. After adding this line in clock_config.c, it is working fine.

    CLOCK_SetupExtClocking(24000000U);                            /* Enable XTALHF clock */
    while(!(ANACTRL->XO32M_STATUS & ANACTRL_XO32M_STATUS_XO_READY_MASK)); /* Wait for XO ready */

 

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Pavel_Hernandez
NXP TechSupport
NXP TechSupport

Hello,

That sound like a hardware issue I recommend reviewing the schematic from the EVK maybe the crystal is not initialization well, please review the app note in the crystal recommendations. Hardware Design Guidelines for LPC55(S)xx Microcontrollers (nxp.com)

Best regards,
Pavel

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962件の閲覧回数
WDA
Contributor I

After talking with some FAEs from Avnet, we discovered that the Config Tools do not generate the code to wait for the XO_READY bit. After adding this line in clock_config.c, it is working fine.

    CLOCK_SetupExtClocking(24000000U);                            /* Enable XTALHF clock */
    while(!(ANACTRL->XO32M_STATUS & ANACTRL_XO32M_STATUS_XO_READY_MASK)); /* Wait for XO ready */

 

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