LPC5536: I measure VCC at true open drain pins.

[danielholala]

Hello,

the LPC55(S)xx series has two true open drain pins:

https://www.nxp.com/docs/en/application-note/AN13033.pdf

PIO0_13 and PIO0_14 are true open drain pins.

I tested this with my own LPC5536 board:

When I do not configure PIO0_13 (pin #46 on 64 pin package), the pin is floating (i.e., high impedance, "Z" as noted in the datasheet).

When I configure PIO0_13 as GPIO and output, I measure a voltage of 3.3 V (i.e., VCC) when set to HIGH.

I wonder why this is?

The datasheet states: "True open-drain pin. [...] The pin requires an external pull-up to provide output functionality.  [...] Open-drain configuration applies to all functions on this pin."

In other words, there should never be any voltage present on this pin (as long as this pin is not connected to external circuitry).

Any ideas why I measure this voltage?

Thanks.
Daniel

[danielholala]

Due to the great wisdom of NXP management, the edit time window has been reduced to only a couple of minutes. So I have to add this separate posting:

The pin PIO0_13 only behaves as open drain when I explicitly configure it as such (by way of Pins tool). 

If this behavior is expected, then I don't understand the datasheet's statement that there's no output on that pin independent of the chosen function (or the datasheet's statement is incorrect).

Note the following observation: if PIO0_13 is configured as OD and set to HIGH, I can easily "float" this pin (e.g., by touching it)  to voltages of say 6 V. This is way more than a "normal" GPIO pin would allow. Usually "normal" pins implement protection diodes which would pull the voltage down to 3,3 V + Vforward as described in the reference manual:

So maybe this is the difference of the "true open drain" pins compared to "normal" pins?

Any comment is appreciated.

Cheers
Daniel

[luis_maravilla]

Hello Daniel,

Could you help us share the following information:

Are you are testing an SDK example?

Are you are using and NXP board or LPC5536 custom board? If so, could you help us sharing your connections in schematics with the PIO0_13?

Could you help us bring information about what will be the use of this pin?

In Reference Manual Chapter 7.2.1 features, comment about that PIO_13 and PIO_14 are a combo for I2C/MFIO (Multi-Function Input Output), this is the difference with a standard pin configuration [MFIO], and in Chapter 7.3, [Figure 8] is a representation on this configuration to compare to a Standard GPIO pin configuration [Figure 7].

In addition, for reviewing your custom board design alongside the Hardware Design Guidelines [AN13707] NXP recommend checking the EVK Board Design Files for validation.

The link for LPC5536 EVK board files is here LPC5536-EVK Design Files

In the Evaluation board the P0_13 and P0_14 are connected to a pull-up resistor, so is expected to measure 3.3v and only to behave as open drain when configured.

Best Regards