Ladies and Gentlemen,
I am trying to set up CTIMER0 for a periodic interrupt. Unfortunately it doesn't work and I'm getting confused.
My questions are:
1- In the Reference Manual -> SYSCON capital, page 223, AHBCLKCTRL1 register has bit26, called TIMER0. Is this bit the clock enable for CTIMER0? Is TIMER0 and CTIMER0 the same thing?
2- when I turn AHBCLKCTRLSET[1], bit26 to 1, I immediately loose the connection between MCUXpresso and MCULINK PRO. That means, I cannot debug anymore. I have to close the debug perspective and open it again.
3- There's another enable bit: SYSCON->CTIMERGLOBALSTARTEN, bit0. Here I can also enable CTIMER0 CLK. Are both enables necessary?
4- In case I don't turn AHBCLKCTRLSET[1], 26 bit to 1, I can debug the chip, but all the instructions to set in the CTIMER0 section, they have no effect at all. I single step through them, but there's no change in the registers.
5- I also can't set to 0 the CTIMERCLKDIV[0] register - I'd like to enable the clock divider
6- CTIMERCLKSEL[0] also cannot select FRO1M, if I try to write this register 0x04, there's no effect.
Since CTIMER0 doesn't work, of course, I don't get any interrupt on it.
Here's the part of my code, which must configure CTIMER0:
// Set up Ctimer0 to generate a periodic interrupt
SYSCON -> CLKUNLOCK =0x01 ; // enables configuration of clocks
SYSCON -> CLOCK_CTRL |= FRO1MHZ_CLK_ENA ; // enable the 1MHz RC oscillator
SYSCON -> AHBCLKCTRLSET[1] |= TIMER0_CLK_EN ; //
SYSCON -> CTIMERCLKDIV[0] = 0x0 ; // ** divider clock runs, division by 1
SYSCON -> CTIMERCLKSEL[0] = FRO1M; // ** CTimer0 clock is 1MHz from FRO
SYSCON -> CLKUNLOCK = 0x00 ; // disables configuration of clocks
SYSCON -> PRESETCTRLCLR[1] |= TIMER0_RST; // reset timer 0
SYSCON -> CTIMERGLOBALSTARTEN |= CTIMER0_CLK_EN; // Ctimer 0 gets clock
CTIMER0 -> TCR |= CEN ; // CTIMER0 Counter enable
CTIMER0 -> PR = 1000U ; // Prescaler set to 1000. 1MHz : 1000 = 1kHz to timer0
CTIMER0 -> MSR[0] = 1000U ; // Match shadow register, also 1000, results in 1sec timer0
CTIMER0 -> MR[0] = 1000U ; // beginning value
CTIMER0 -> MCR |= MR0S | MR0RL | MR0I ; // stop on match, reload MR0 from shadow, generate IT
NVIC -> ISER[0] |= 1U<<10 ; // Enable Interrupt No 10 (Timer0)
7- I got bit 10 from the file LPC5536.h, line 93. I didn't find any other documentation, if this interrupt is really from CTIMER0. Is it right?
Other parts of my - at the moment still primitive - code are properly working, I can debug them - whenever the debugger works.