LPC55 systick clock

[kbetts]

I am trying to set up the LPC55 systick so that it can call the interrupt once per second. The core clock is connected to 150MHz so the systick needs to be connected to a slower clock or divided. I have tried calling CLOCK_AttachClk(kFRO1M_to_SYSTICK0) but when I call CLOCK_GetSystickClkFreq(0) afterwards to check that it worked, it returns a frequency of 0. Do I need to enable the 1MHz clock somewhere? I haven't been able to find any reference to it in the User Manual or driver code.

[Alice_Yang]

Hello @kbetts 

Systick timer usually used on RTOS ticks or high frequency application. 

Recommend you use other timers, for example CTIMER or MRT(Multi-Rate Timer).

BR

Alice

[kbetts]

As ever, the solution was to circumvent the driver functions and write to straight to the registers. The following code divides the systick clock by 150:

SYSCON->SYSTICKCLKDIV0 = 149;

EDIT: This doesn't seem to work. Increasing the clock divisor increases the rate at which the systick fires rather than decreasing it. This is confusing as CLOCK_GetSystickClkFreq(0) reports a lower frequency when the clock divisor is increased. I have started a new question about the SYSCON->SYSTICKCLKDIV0 register here: https://community.nxp.com/t5/LPC-Microcontrollers/LPC55-systick-clock-divider/m-p/1656693

[frank_m]

This is "standard" CMSIS functionality, usually implemented as an inline function SysTick_Config() in the core_cm<x>.h header provided by ARM (via the vendor).

[kbetts]

SysTick_Config allows you to set the number of ticks after which the systick fires, up to a maximum of 2^24 (for the LPC55 at any rate). (2^24) / 150MHz ~= 0.112 seconds, which isn't long enough to fire the systick once per second.

[frank_m]

> SysTick_Config allows you to set the number of ticks after which the systick fires, up to a maximum of 2^24 (for the LPC55 at any rate).

This is part of the ARM core IP, and not up to the vendor (and thus LPC55).

I use to set up a 1ms, 10ms or 100ms rate, and count in the systick handler. Which has the advantage of being portable across all Cortex M devices.

[kbetts]

I am aware of this limitation of the counter. That is why I am asking about clock dividing or clock sources. The User Manual of the LPC55 states that the systick can be configured to use lower frequency clock sources, which is what the question is asking about. I don't want to fire it more often and do my own counting because I don't want unnecessary interrupts taking up CPU time.

[frank_m]

> That is why I am asking about clock dividing or clock sources. The User Manual of the LPC55 states that the systick can be configured to use lower frequency clock sources, which is what the question is asking about.

I am not aware of such a possibility, and never came across such a capability in a variety of devices - which does not inlude M33, though.

The systick timer is part of the core and tied directly to the core clock.
Other counters/timers are vendor-specific units, and connected via peripheral busses which are clocked differently (usually fractions of the core clock).

> I don't want to fire it more often and do my own counting because I don't want unnecessary interrupts taking up CPU time.

The alternative is non-portable solution using device- of family specific timer units. Which might be ok.
Though I think a dozen instructions every 100ms do hardly mess up the application timing.
Unless perhaps in really tight applications like for cycle-by-cycle control loops. 

A lot depends on the general project goals - minimal BOM costs vs. platform compatibility.