I need to force the parity bit when transmitting data via USART. Older NXP MCUs (LPC17xx, LPC18xx) have 4 options for parity setting. Example for LPC17xx:
However, LPC54s018 does not:
I thought about using the 9th bit by setting DATALEN to 2, but the FIFO write data register only accepts 8bits.
Please advise.
Never mind, FIFOWR is 9bit wide. However, Please note a shortcoming in the SDK's fsl_usart.h, the API does not allow for 9bits data transfer. (only 7 or 8bits are allowed):
Hello bob belmont
Although the enum only enumerates until 8bits you can add a variable to add the 9bit. The usar_data_len_t gets written at the CFG register. So writing a 2 will allow the 9bit transfer.
Let me know if this is helpful.
Best Regards,
Omar
