 
					
				
		
Hi NXP community
I am using LPC546xx and have found a mismatch between the SDK 2.5.0 and User Manual UM10912 concerning static and dynamic memory regions depending on Cip Select:
Static Memory Chip Select Base address
CS0: 0x8000'000 (UM10912) vs 0x8000'0000 (SDK)
CS1: 0x8800'000 (UM10912) vs 0x9000'0000 (SDK)
CS2: 0x9000'000 (UM10912) vs 0x9800'0000 (SDK)
CS3: 0x9800'000 (UM10912) vs 0x9C00'0000 (SDK)
Dynamic Memory Chip Select Base address
CS0: 0xA000'000 (UM10912) vs 0xA000'0000 (SDK)
CS1: 0xA800'000 (UM10912) vs 0xB000'0000 (SDK)
CS2: 0xB000'000 (UM10912) vs 0xC000'0000 (SDK)
CS3: 0xB800'000 (UM10912) vs 0xD000'0000 (SDK)
Which one is the correct one? SDK or User Manual?
Dani
 
					
				
		
 xiangjun_rong
		
			xiangjun_rong
		
		
		
		
		
		
		
		
	
			
		
		
			
					
		Hi, Daniel,
The UM10912 description is correct.
Hope it can help you
BR
XiangJun Rong
 
					
				
		
Hi Rong
So how can I fit up to 256 MB into the dynamic memory sections without writing into the next section?
0xA000'0000 - 0xA7FF'FFFF allows a maximum of 128 MB NOT 256 MB.
I believe the User Manual is also wrong!
Dani
 
					
				
		
 xiangjun_rong
		
			xiangjun_rong
		
		
		
		
		
		
		
		
	
			
		
		
			
					
		Hi, Daniel,
For the SDRAM address map Table, I think the size 256MB is correct, but the address range is incorrect.
Pls download the an12026.pdf from the link:
https://www.nxp.com/docs/en/nxp/application-notes/AN12026.pdf
it gives the chip select for both DRAM and SRAM.
BR
XiangJun Rong
 
					
				
		
Great information - thank you Rong - Wish you a great weekend. I should be able to work with this now.
Many thanks
Dani
