The
LPC546xx User Manual UM10912
Rev. 2.1
9 November 2017
in
Table 139 AHB Clock Control register 0 (AHBCLKCTRL0, main syscon: offset 0x200) bit description
documents the Reset value after boot to be 0 for
Bit --> 3
Symbol --> SRAM1
Description --> Enables the clock for SRAM1. 0 = Disable; 1 = Enable.
Reset value after boot --> 0
I cannot see that the "Reset value after boot" is 0 in my debugger. The bit is set to 1.
Is this a typo in the User Manual?
If yes, can this be corrected in the next release of this User Manual?
Many Thanks
Dani
Hi,
You are correct, we will check this internally. Thank you for your feedback.
Regards
Sol