LPC546xx , OM13092, OM13098: simultaneous availability of 2xI2S RX and 2xI2S TX?

[callum_haig]

I'd like to prototype a design that requires an external codec and an MCU exchanging four channels of audio data (over I2S) in full duplex. This would require the MCU to support 1xI2C, 2xI2S in receive mode, and 2xI2S in transmit mode. From what I can tell, the LPC546xx family of devices is capable of exposing the requisite type and number of interfaces, but the relevant available LPCXpresso boards (OM13092, OM13098) are not; can somebody please confirm?

Thanks in advance for any assistance.

[EngHuiPeng]

Hello Dezheng,

Can customer using LPC546XX configured the flexcomm 6 as follow: 

Flexcomm 6 configured for receive of "I2S Pair A", "I2S Pair B" and "I2S Pair C" . All share a single data line, using TDM in I2S mode. 

Regards,

Audrey

[Dezheng_Tang]

Audrey,

    I have no knowledge in TDM, but since it's time division multiplexing, sharing A and B and sharing A and B and C shouldn't make any difference, especially all in one direction, right? I can't confirm though.

[callum_haig]

I've been trying to compare the configuration of the LPC546xx devices required to achieve two I2S pairs (four channels) in full duplex, with the equivalent configuration for the LPC43xx devices.

Perhaps someone can confirm if the suggestions below are correct:

LPC546xx
Flexcomm 6 configured for receive of "I2S Pair A" and "I2S Pair B". Both pairs share a single data line, using TDM in I2S mode.
Flexcomm 7 configured for transmit of "I2S Pair A" and "I2S Pair B". Both pairs shared a single data line, using TDM in I2S mode.

LPC43xx
I2S0 configured for transmit and receive of "I2S Pair A". Transmit and receive use separate data lines, and do not require TDM to carry a channel pair.
I2S1 configured for transmit and receive of "I2S Pair B". Transmit and receive use separate data lines, and do not require TDM to carry a channel pair.

Are there any opinions on which of these would be better suited to the task I described earlier?

For the LPC546xx devices, when there is a reliance on TDM to share the data for multiple I2S pairs on a single data line, what is the relationship between the number of pairs and maximum sample depth?

Thanks in advance for any assistance.

[callum_haig]

I've managed to locate and check schematics in a file titled "LPC54608_Dev_brd_schematic_Rev-C.pdf". They seem to indicate that the even-numbered pins 10-20 of connector J9 of the evaluation board expose the following pins:

P4_2-FC6_I2S_TX_DATA
P4_3-FC6_I2S_TX_WS
P4_1-FC6_I2S_TX_SCK
P2_18-FC7_I2S_RX_SCK
P2_20-FC7_I2S_RX_W S
P2_19-FC7_I2S_RX_DAT

If this reflects the capabilities of the OM13092 and OM13098 boards I asked about earlier, then it seem that they can support the use-case I described; confirmation would still be appreciated.

One thing I can't find is the exposure of MCLK, which I understand may have a role in some I2S configurations.

[Dezheng_Tang]

You are correct that you can configure two flexcomms as two I2S peripherals. On the board you mentioned, P3.11 is used as MCLK. There are three other pins, P1.31, P2.21, P3.11, P5.7, which can be configured as MCLK as well.

User manual has all the details:

http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/lpc-cortex-m-mcus/lpc5400...