Tang,
I understand 
The board I have made has also footprints for USB, SD, NAND flash and SDRAM etc but none of this are mounted on the board I do the power tests on. I have taken the original schematic and removed all components that are not mounted to simplify things. The stuff you see on the attached schematic is exactly what are mounted on the board (picture of the board in my original post)
The power supply is coming from a lab supply (3.2 V). Current is measure with a Agilent (keysight) 34461A benchtop multimeter (also measured across a 10 ohm resistor with a Keysight MSOX3024T scope)
I had forgotten to remove the pullup in IOCON register for P3.15, when I do that the power drops to 510 uA in deepsleep (before this it was 560 uA).
NOTE: C23 (22 uF) has been removed, no change in current (was afraid of leakage if defect etc)
To get a little closer to whats going on, I tried the utick_wakeup project from the SDK (version 2.2). With this example, a little modified to the original, I get 255 uA in deepsleep! This better than my own example, but still 10 times worse than the datasheet ?
The code from utick_wakeup.c and pin_mux.c is below:
/* * Copyright (c) 2016, Freescale Semiconductor, Inc. * Copyright 2016-2017 NXP * * Redistribution and use in source and binary forms, with or without modification, * are permitted provided that the following conditions are met: * * o Redistributions of source code must retain the above copyright notice, this list * of conditions and the following disclaimer. * * o Redistributions in binary form must reproduce the above copyright notice, this * list of conditions and the following disclaimer in the documentation and/or * other materials provided with the distribution. * * o Neither the name of the copyright holder nor the names of its * contributors may be used to endorse or promote products derived from this * software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "fsl_debug_console.h" #include "board.h" #include "fsl_common.h" #include "fsl_power.h" #include "fsl_utick.h" #include "pin_mux.h" #include <stdbool.h> /******************************************************************************* * Definitions ******************************************************************************/ #define APP_EXCLUDE_FROM_DEEPSLEEP \ (SYSCON_PDRUNCFG_PDEN_SRAMX_MASK | SYSCON_PDRUNCFG_PDEN_SRAM0_MASK | SYSCON_PDRUNCFG_PDEN_SRAM1_2_3_MASK | \ SYSCON_PDRUNCFG_PDEN_WDT_OSC_MASK) #define APP_LED_INIT (LED3_INIT(1)); #define APP_LED_TOGGLE (LED3_TOGGLE()); #define UTICK_TIME 3000000 /******************************************************************************* * Prototypes ******************************************************************************/ /*! * @brief delay a while. */ void delay(void); /******************************************************************************* * Code ******************************************************************************/ void delay(void) { volatile uint32_t i = 0; for (i = 0; i < 3000000; ++i) { __asm("NOP"); /* delay */ } } /*! * @brief Main function */ int main(void) { /* enable clock for GPIO*/ CLOCK_EnableClock(kCLOCK_Gpio3); BOARD_InitPins(); /* Running FRO = 12 MHz*/ BOARD_BootClockFRO12M(); APP_LED_INIT; UTICK_Init(UTICK0); /* Set the UTICK timer to wake up the device from reduced power mode */ UTICK_SetTick(UTICK0, kUTICK_Repeat, UTICK_TIME, NULL); /* Enter Deep Sleep mode */ POWER_EnterDeepSleep(APP_EXCLUDE_FROM_DEEPSLEEP); while (1) { LED3_ON(); delay(); LED3_OFF(); POWER_EnterDeepSleep(APP_EXCLUDE_FROM_DEEPSLEEP); } }
/*
* Copyright (c) 2016, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* o Redistributions in binary form must reproduce the above copyright notice, this
* list of conditions and the following disclaimer in the documentation and/or
* other materials provided with the distribution.
*
* o Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
* TEXT BELOW IS USED AS SETTING FOR THE PINS TOOL *****************************
PinsProfile:
- !!product 'Pins v2.0'
- !!processor 'LPC54608J512'
- !!package 'LPC54608J512ET180'
- !!mcu_data 'ksdk2_0'
- !!processor_version '0.0.0'
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE PINS TOOL ***
*/
#include "fsl_common.h"
#include "fsl_iocon.h"
#include "pin_mux.h"
#define IOCON_PIO_DIGITAL_EN 0x0100u /*!< Enables digital function */
#define IOCON_PIO_FUNC0 0x00u /*!< Selects pin function 0 */
#define IOCON_PIO_FUNC1 0x01u /*!< Selects pin function 1 */
#define IOCON_PIO_FUNC5 0x05u /*!< Selects pin function 5 */
#define IOCON_PIO_FUNC6 0x06u /*!< Selects pin function 6 */
#define IOCON_PIO_INPFILT_OFF 0x0200u /*!< Input filter disabled */
#define IOCON_PIO_INV_DI 0x00u /*!< Input function is not inverted */
#define IOCON_PIO_MODE_INACT 0x00u /*!< No addition pin function */
#define IOCON_PIO_MODE_PULLUP 0x20u /*!< Selects pull-up function */
#define IOCON_PIO_OPENDRAIN_DI 0x00u /*!< Open drain is disabled */
#define IOCON_PIO_SLEW_STANDARD 0x00u /*!< Standard mode, output slew rate control is enabled */
#define PIN2_IDX 2u /*!< Pin number for pin 2 in a port 2 */
#define PIN10_IDX 10u /*!< Pin number for pin 10 in a port 0 */
#define PIN12_IDX 12u /*!< Pin number for pin 12 in a port 3 */
#define PIN29_IDX 29u /*!< Pin number for pin 29 in a port 0 */
#define PIN30_IDX 30u /*!< Pin number for pin 30 in a port 0 */
#define PORT0_IDX 0u /*!< Port index */
#define PORT2_IDX 2u /*!< Port index */
#define PORT3_IDX 3u /*!< Port index */
/*
* TEXT BELOW IS USED AS SETTING FOR THE PINS TOOL *****************************
BOARD_InitPins:
- options: {coreID: singlecore, enableClock: 'true'}
- pin_list:
- {pin_num: A2, peripheral: FLEXCOMM0, signal: TXD_SCL_MISO, pin_signal: PIO0_30/FC0_TXD_SCL_MISO/CTIMER0_MAT0/SCT0_OUT9/TRACEDATA(1), mode: inactive, invert: disabled,
glitch_filter: disabled, slew_rate: standard, open_drain: disabled}
- {pin_num: B13, peripheral: FLEXCOMM0, signal: RXD_SDA_MOSI, pin_signal: PIO0_29/FC0_RXD_SDA_MOSI/CTIMER2_MAT3/SCT0_OUT8/TRACEDATA(2), mode: inactive, invert: disabled,
glitch_filter: disabled, slew_rate: standard, open_drain: disabled}
- {pin_num: C3, peripheral: GPIO, signal: 'PIO2, 2', pin_signal: PIO2_2/ENET_CRS/FC3_SSEL3/SCT0_OUT6/CTIMER1_MAT1, mode: pullUp, invert: disabled, glitch_filter: disabled,
slew_rate: standard, open_drain: disabled}
- {pin_num: L2, peripheral: SYSCON, signal: CLKOUT, pin_signal: PIO3_12/SCT0_OUT8/CTIMER3_CAP0/CLKOUT/EMC_CLK(1)/TRACECLK, mode: inactive, invert: disabled, glitch_filter: disabled,
slew_rate: standard, open_drain: disabled}
- {pin_num: P2, peripheral: SWD, signal: SWO, pin_signal: PIO0_10/FC6_SCK/CTIMER2_CAP2/CTIMER2_MAT0/FC1_TXD_SCL_MISO/SWO/ADC0_0, mode: inactive, invert: disabled,
glitch_filter: disabled, open_drain: disabled}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE PINS TOOL ***
*/
/*FUNCTION**********************************************************************
*
* Function Name : BOARD_InitPins
* Description : Configures pin routing and optionally pin electrical features.
*
*END**************************************************************************/
void BOARD_InitPins(void) {
CLOCK_EnableClock(kCLOCK_Iocon); /* Enables the clock for the IOCON block. 0 = Disable; 1 = Enable.: 0x01u */
const uint32_t port0_pin10_config = (
IOCON_PIO_FUNC6 | /* Pin is configured as SWO */
IOCON_PIO_MODE_INACT | /* No addition pin function */
IOCON_PIO_INV_DI | /* Input function is not inverted */
IOCON_PIO_DIGITAL_EN | /* Enables digital function */
IOCON_PIO_INPFILT_OFF | /* Input filter disabled */
IOCON_PIO_OPENDRAIN_DI /* Open drain is disabled */
);
IOCON_PinMuxSet(IOCON, PORT0_IDX, PIN10_IDX, port0_pin10_config); /* PORT0 PIN10 (coords: P2) is configured as SWO */
const uint32_t port3_pin012_config = (
IOCON_PIO_FUNC0 | /* Pin is configured as PIO2_2 */
IOCON_PIO_MODE_PULLUP | /* Selects pull-up function */
IOCON_PIO_INV_DI | /* Input function is not inverted */
IOCON_PIO_DIGITAL_EN | /* Enables digital function */
IOCON_PIO_INPFILT_OFF | /* Input filter disabled */
IOCON_PIO_SLEW_STANDARD | /* Standard mode, output slew rate control is enabled */
IOCON_PIO_OPENDRAIN_DI /* Open drain is disabled */
);
IOCON_PinMuxSet(IOCON, 3, 0, port3_pin012_config); /* PORT3 PIN0 (coords: C3) is configured as PIO3_0 */
IOCON_PinMuxSet(IOCON, 3, 1, port3_pin012_config); /* PORT3 PIN1 (coords: C3) is configured as PIO3_1 */
IOCON_PinMuxSet(IOCON, 3, 2, port3_pin012_config); /* PORT3 PIN2 (coords: C3) is configured as PIO3_2 */
const uint32_t port3_pin15_config = (
IOCON_PIO_FUNC0 | /* Pin is configured as PIO3_15 */
IOCON_PIO_MODE_INACT | /* Selects no pull function */
IOCON_PIO_INV_DI | /* Input function is not inverted */
IOCON_PIO_DIGITAL_EN | /* Enables digital function */
IOCON_PIO_INPFILT_OFF | /* Input filter disabled */
IOCON_PIO_SLEW_STANDARD | /* Standard mode, output slew rate control is enabled */
IOCON_PIO_OPENDRAIN_DI /* Open drain is disabled */
);
IOCON_PinMuxSet(IOCON, 3, 15, port3_pin15_config); /* PORT3 PIN15 (coords: C3) is configured as PIO3_15 */
}
/*******************************************************************************
* EOF
******************************************************************************/
Carsten,
I got deep sleep current working on the 208-pin package socketed NXP validation board. I tested 3 chips on this board. There are some loose connection on the socket I struggled a lot, but once it's working, the overall the deep sleep current should match what our Datasheet states, 20~25uA.
Once you program the flash, if you have SWCLK tied to GND, the deep sleep current is around mid-70uA, take the jumper out to leave it open, it should be mid-20uA. I tried to tie VREFN to AGND or GND or both, it didn't make any difference. Attached here is my test code. But, for some reason, I suspect it's not your code but something is wrong on your board.
Best regards,
Tom
