Hi jeremyzhou,
I did sth but now have a new problem, I see some datas, receiving datas in fifo0 but I don't know how to see them in buffer.

These are datas I want to see but don't know how to use them. For example I want to use switch case structure according to first data but I don't know how. Could you help me ?
#include "fsl_debug_console.h"
#include "fsl_mcan.h"
#include "board.h"
#include "pin_mux.h"
#include <stdbool.h>
#define EXAMPLE_MCAN_IRQHandler CAN0_IRQ0_IRQHandler
#define EXAMPLE_MCAN_IRQn CAN0_IRQ0_IRQn
#define EXAMPLE_MCAN CAN0
#define MCAN_CLK_FREQ CLOCK_GetFreq(kCLOCK_MCAN0)
#define STDID_OFFSET 18U
#define MSG_RAM_BASE 0x20010000U
#define STD_FILTER_OFS 0x0
#define RX_FIFO0_OFS 0x100U//0x10U
#define TX_BUFFER_OFS 0x20U
int8_t count;
uint8_t RB[8];
/*******************************************************************************
* Prototypes
******************************************************************************/
/*******************************************************************************
* Variables
******************************************************************************/
volatile bool rxComplete = false;
mcan_rx_buffer_frame_t rxFrame;
mcan_fifo_transfer_t rxXfer;
mcan_handle_t mcanHandle;
/*******************************************************************************
* Code
******************************************************************************/
void CAN0_IRQ0_IRQHandler(void)
{
MCAN_ClearStatusFlag(EXAMPLE_MCAN, CAN_IR_RF0N_MASK);
MCAN_ReadRxFifo(EXAMPLE_MCAN, 0, &rxFrame);
// MCAN_ReadRxBuffer(CAN0, 18U, &rxFrame);
rxComplete = true;
/* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
exception return operation might vector to incorrect interrupt */
#if defined __CORTEX_M && (__CORTEX_M == 4U)
__DSB();
#endif
}
/*!
* @brief Main function
*/
int main(void)
{
mcan_config_t mcanConfig;
mcan_frame_filter_config_t rxFilter;
mcan_std_filter_element_config_t stdFilter;
mcan_rx_fifo_config_t rxFifo0;
mcan_rx_buffer_config_t rxBuffer;
/* Initialize board hardware. */
/* attach 12 MHz clock to FLEXCOMM0 (debug console) */
CLOCK_AttachClk(BOARD_DEBUG_UART_CLK_ATTACH);
/* Set MCAN clock 48/6=8MHz. */
CLOCK_SetClkDiv(kCLOCK_DivCan0Clk, 22U, true);
BOARD_InitPins();
// BOARD_BootClockFROHF48M();
BOARD_BootClockPLL180M();
BOARD_InitDebugConsole();
MCAN_GetDefaultConfig(&mcanConfig);
// mcanConfig.enableLoopBackExt = true;
// mcanConfig.enableCanfdNormal = true;
MCAN_Init(EXAMPLE_MCAN, &mcanConfig, MCAN_CLK_FREQ);
/* Set Message RAM base address and clear to avoid BEU/BEC error. */
MCAN_SetMsgRAMBase(EXAMPLE_MCAN, MSG_RAM_BASE);
uint32_t *p=(uint32_t *)(MSG_RAM_BASE);
memset(p, 0, TX_BUFFER_OFS + 0x10U);
/* STD filter config. */
// rxFilter.address = 0x100;
// rxFilter.idFormat = kMCAN_FrameIDStandard;
// rxFilter.listSize = 1U;
// rxFilter.nmFrame = kMCAN_reject0;
// rxFilter.remFrame = kMCAN_rejectFrame;
// MCAN_SetFilterConfig(EXAMPLE_MCAN, &rxFilter);
stdFilter.sfec = kMCAN_storeinFifo0;
// stdFilter.sft = kMCAN_dual;
// stdFilter.sfid1 = 0x002U;
// stdFilter.sfid2 = 0x000U;
MCAN_SetSTDFilterElement(EXAMPLE_MCAN, &rxFilter, &stdFilter, 0);
/* RX fifo0 config. */
rxFifo0.address = RX_FIFO0_OFS;
rxFifo0.elementSize = 1U;
rxFifo0.watermark = 0;
rxFifo0.opmode = kMCAN_FifoBlocking;
rxFifo0.datafieldSize = kMCAN_8ByteDatafield;
MCAN_SetRxFifo0Config(EXAMPLE_MCAN, &rxFifo0);
// rxBuffer.address = RX_FIFO0_OFS;;
// rxBuffer.datafieldSize = kMCAN_8ByteDatafield;
// MCAN_SetRxBufferConfig(EXAMPLE_MCAN, &rxBuffer);
/* Enable RX fifo0 new message interrupt using interrupt line 0. */
MCAN_EnableInterrupts(EXAMPLE_MCAN, 0, CAN_IE_RF0NE_MASK);
EnableIRQ(CAN0_IRQ0_IRQn);
/* Enter normal mode. */
MCAN_EnterNormalMode(EXAMPLE_MCAN);
while (1)
{
while(!rxComplete)
{
}
PRINTF("ID: %3x", rxFrame.id >> 18);
PRINTF(" DATA: ");
count = 9U;
while(--count)
{
PRINTF("0x%x ", *(rxFrame.data++));
}
while(++count < 9U)
{
rxFrame.data--;
}
PRINTF("\r\n");
}
}